Embedded Technology
Recommendations for source impedance termination using HCMOS XOS
By Christian Büchler, head of technical support, and Phil Peng, technical manager, Jauch Quartz GmbH M The problem
Whenever an HCMOS output buffer with a lower source impedance is used to drive a load with a higher impedance over a PCB clock trace, an impedance mismatch occurs. Depending on the application and the PCB layout this impedance mismatch causes voltage reflections to occur from the load, which potentially create steps or glitches in the clock waveform, ringing as well as overshoots and undershoots. Such kind of degraded waveforms can result in poor system performance by degrading the clock signal at the receiver end, causing false clocking of data and generating unwanted triggering.
The reason for termination The output of the oscillator will typically feed a trace on the PCB, which can only be seen as a simple connection if it is sufficiently short.
16 April 2026
ost of the oscillators in the frequency range below 150 MHz offer a single ended HCMOS or LVCMOS compatible output with
a rail-to-rail output swing. The acronym CMOS comes from the Complementary Metal Oxide Semiconductor, which means that the output buffer of the oscillator is built from complementary p-channel and n-channel MOS transistors.
Ideally, the output buffer of an oscillator can be seen as an output stage that can swing rail-to-rail. However, a practical output stage built from the MOS transistors will show some losses, which are represented by a source resistor RI with a low impedance.
However, longer clock traces on a PCB can no longer be simplified as a lumped trace. Effectively, a longer clock trace on the PCB must be considered as a transmission line, which means that clock signal edges travel along the PCB trace at a fast propagation speed.
If the length of PCB trace exceeds certain limits, a matching of the transmission line impedance is required. Depending on the signal standard, the impedance matching is done at the receiver side, the transmitter side or even on both sides. Typically, termination resistors are used for impedance matching. Preferably, impedance matching is done at both ends of the transmission line, to avoid reflections at both sides. However, in HCMOS circuits a termination at the receiver side is not allowed.
Typically, an HCMOS compatible input of a receiver shows a high input resistance in parallel with a small pin input capacitance. Termination resistors aren’t acceptable at the receiver side, as a HCMOS receiver input requires a rail-to-rail swing to detect “H” and “L” levels properly. Adding a termination resistor at the receiver end of the transmission line would reduce the clock signal swing, and the input signal to the receiver would probably no longer meet the required threshold levels. However, a quasi-open end
Components in Electronics
of a transmission line at the receiver side will cause signal reflections that travel back to the transmitter, i.e. to the buffer output stage of the oscillator. That is why an impedance matching at the transmitter side (i.e. the output of the oscillator) is recommended, to avoid further reflections of pulses that were already reflected at the receiver side. By this termination method, the waveform will not be degenerated, and will meet the standard waveform required by HCMOS receivers.
Clock pulses and their spectral content
First of all, it’s important to understand that the need for impedance matching does not depend on the clock frequency itself, but on the rise and fall time of the signal edges that travel along the PCB trace. In fact, very fast rising and falling edges will cause a high frequency spectral content at multiples of the oscillators clock frequency. Such kind of high frequency spectral content is caused by higher order harmonics, which are contained in the almost rectangular waveform of the clock output signal.
The so-called pulse reflections will occur, if the length of the signal trace comes close to the wavelength of the highest frequencies inside the spectral content of the clock signal. As the high frequency spectral content depends on the rise and fall time of the clock signal, the critical length of a PCB trace can be estimated based on the specified rise and fall times of the oscillator clock output.
The critical wavelength As a rule of thumb, we can say that the critical length of a signal trace should be six times shorter than the wavelength of the harmonic components that dominate the duration of a rising or falling edge of the clock signal.
To calculate the wavelength , we have to take the propagation speed of a signal edge on the transmission line into account. The propagation speed along the transmission line is determined by the PCB base material.
For FR4 PCB material with an = 4 the propagation speed VSig can be estimated as follows:
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