and multicast traffi c, whilst freeing the processor from this task. To fi lter by the destination MAC address

is key. Instead of just a single MAC address, a MAC-PHY can support fi ltering using up to 16 unicast or multicast MAC addresses. In addition, address masking is supported for two MAC addresses. This gives a great degree of freedom, fi ltering for the device address as well as commonly-supported multicast addresses such as LLDP (Link Layer Discovery Protocol). By supporting an additional queue for higher priorities, some messages can be prioritised and therefore get improved latency and robustness. The priority of a frame can be identifi ed by the MAC fi ltering table. For example, broadcast messages can be fed into a lower priority queue and unicast into the higher priority queue to prevent the receiver from being overloaded by a broadcast storm or traffi c surge. These MAC-PHY fi ltering features enable netload robust devices. Frame statistics are also gathered by the MAC to assist in monitoring the network traffi c and the quality of the link; see Figure 1.

The MAC in the MAC-PHY also supports IEEE 1588, and therefore 802.1AS time synchronisation as required in process automation. The MAC-PHY provides support for a synchronised counter, timestamping of received messages and timestamp capture for transmit messages. This greatly reduces the complexity of the software design, as there is no further hardware support needed to implement time synchronisation beyond the MAC-PHY itself. The MAC can generate an output waveform timed to the synchronised counter, which may be used to synchronise external application-level operations.

The SPI interface supports the Open Alliance 10BASE-T1x MAC-PHY Serial Interface. The Open Alliance SPI is a new and very eff ective SPI protocol designed specifi cally for use with a MAC-PHY.

When to use a 10BASE-T1L MAC- PHY and a 10BASE-T1L PHY Both a 10BASE-T1L PHY and a 10BASE- T1L MAC-PHY bring signifi cant advantages in diff erent use cases. For power critical applications, a 10BASE-T1L MAC-PHY enables lower system power by providing more fl exibility on the choice of host processor to include ultra low power processors that do not have an integrated MAC. When upgrading an existing device

Figure 2: Comparison of the advantages of a MAC-PHY vs a PHY for 10BASE-T1L connectivity

to add Ethernet connectivity, a 10BASE- T1L MAC-PHY provides a route to reusing the existing processor and adding Ethernet connectivity via an SPI port, removing the requirement to move to a larger processor with an integrated MAC.

For high-performance applications where a fi eld or edge device requires a high- performance processor that may already have an integrated MAC, a 10BASE-T1L PHY with MII, RMII and RGMII MAC interfaces allows a 10BASE-T1L PHY to be quickly developed. This is done by reusing existing MAC interface drivers to add Ethernet connectivity; see Figure 2.

Increased flexibility for tomorrow’s Ethernet-connected process installations With the availability of both 10BASE- T1L PHYs (ADIN1100) and 10BASE-T1L MAC-PHYs (ADIN1110), device architects now have increased fl exibility to meet the requirements of tomorrow’s Ethernet- connected manufacturing installations. Ultra low power devices and high- performance devices can be deployed on the same Ethernet network and comply with strict maximum power limitations for hazardous area use case requirements. 10BASE-T1L power switches and 10BASE- T1L fi eld switches require robust, low- power 10BASE-T1L PHYs to be used with industrial Ethernet switches to deploy a trunk-and-spur network topology that provides both power and data over a single twisted pair cable, including hazardous area use cases.

Field device connectivity requires both 10BASE-T1L PHYs and 10BASE-T1L MAC- PHYs to enable Ethernet connectivity to a wide range of fi eld devices. Higher power fi eld devices, including fl owmeters, will use a high performance processor, with an integrated MAC with a 10BASE-T1L PHY. Lower power fi eld devices, including temperature sensors with an ultra low power processor that does not have an integrated MAC, will use a 10BASE-T1L MAC-PHY for Ethernet connectivity via an SPI interface to the processor; see Figure 3.

Comparison of 10BASE-T1L PHY and 10BASE-T1L MAC-PHY key features The ADIN1110, ADI’s 10BASE-T1L MAC-PHY, enables lower power Ethernet connectivity via an SPI interface to a host processor with only 42mW of power consumption. The ADIN1110 supports the Open Alliance 10BASE-T1x MAC- PHY Serial Interface for full-duplex SPI communications at 25MHz clock speed. The ADIN1100, ADI’s 10BASE-T1L PHY, enables low-power Ethernet connectivity via MII, RMII and RGMII MAC interfaces to a host processor with only 39mW of power consumption – see Table 1 for a comparison of the ADIN1100 10BASE-T1L PHY and ADIN1110 10BASE-T1L MAC- PHY. Both products are based on 10BASE- T1L core capability of a full-duplex, DC- balanced, point-to-point communication scheme with PAM 3 modulation at a 7.5MBd symbol rate with 4B3T coding. 10BASE-T1L supports two amplitude

Automation | June 2021 9

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