POWER DEVICES
Paralleling Very Low Dropout Linear Regulators for Increased Output Current and Even Heat Distribution
Molly Zhu, senior applications engineer and Fei Guo, field applications engineer at Analog Devices discuss how to parallel the 3A LT3033 very low dropout regulator (VLDO) for applications that require a current higher than 3A, with the added benefit of spreading heat dissipation
E
ach successive generation of computing systems demands more total power and lower supply voltages than its predecessor,
challenging power supply designers to keep pace with higher output current in a small area. At high power densities with low output voltages, the problem of heat dissipation rises to the top of the design priority list, especially for linear regulators in low noise applications. Paralleling LDO regulators can increase the supply current capability and mitigate heat dissipation, reducing the temperature rise of any particular component and the required size and number of cooling devices. This article shows how to parallel the 3A LT3033 very low dropout
regulator (VLDO) for applications that require a current higher than 3A, with the added benefit of spreading heat dissipation. The LT3033 can be easily paralleled - and current balanced - due to its built-in output current monitoring feature. The LT3033 converts 1.14V to 10V input supplies to outputs as low as
0.2V with load currents up to 3A. The dropout voltage is only 95mV at full load. Quiescent current is 1.8mA during operation, dropping to 22µA when shutdown. Programmable current limit and thermal protection give it the necessary robustness for high current, low voltage applications.
3A, single VLDO application Figure 1 shows the LT3033 delivering 0.9V at 3A from a 1.2V input supply. A minimum of 10µF very low ESR ceramic capacitor is required at the IN and OUT pins for stability. Adding a feedforward capacitor (CFF
) from VOUT lower the output voltage noise. A 10nF bypass capacitor from the Figure 2: LT3033 demonstration board to the ADJ pin can improve the transient response and
REF/BYP pin to GND typically reduces output voltage noise to 60µV rms in a 10Hz to 100kHz bandwidth and soft starts the reference. The minimum input voltage required for regulation equals the regulated output voltage VOUT plus the dropout voltage or 1.14V, whichever is greater. A demonstration board is shown in Figure 2. Current limit is programmable by connecting a single resistor from
the ILIM pin to GND, accurate to ±12% over a wide temperature range. The external current limit may be overridden by internal current limit with foldback when the input and output differential voltage exceeds 5V. LT3033 provides an output current monitor by pulling the IMON pin
to GND through a resistor. The IMON pin is the collector of a PNP, which mirrors the LT3033 output PNP at a ratio of 1:2650. The resistor voltage is proportional to the output current if it is not higher than VOUT
– 400mV. Figure 1: LT3033 typical application 24 DECEMBER/JANUARY 2022 | ELECTRONICS TODAY
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