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but should be considered in high accuracy applications. This is usually specified in data sheets at ambient temperature.
solder Heat resistance shift Solder heat resistance (SHR) shift is particularly relevant to reference source. It refers to the permanent shift in output voltage that is induced by exposure to reflow soldering and is expressed as a percentage of the output voltage. See the data sheets for the ADR45xx family for more details. In general, all ICs are somehow affected by the SHR shift, but this is not always quantifiable, and it depends greatly on the specific system assembly for the application.
long-Term stability Long-term stability defines the change in output voltage vs. time and is specified in ppm/1,000 hours. An application’s long-term stability can be improved by PCB-level burn-in.
open-loop CalibraTion THeory A DAC signal chain simplified diagram is shown in Figure 2. The blocks outlined in black show a simplified open-loop signal chain, while those outlined in gray are an example of the additional components needed to realise the closed-loop signal chain. The closed-loop option requires additional components and digital data manipulation via software to deliver a much more accurate output. When these additional resources cannot be added for various reasons (space, cost, etc.), the open-loop solution is still valid - provided it can deliver the required accuracy. That is where this article can help in clarifying how the open- loop calibration can be done.
The gain can be calibrated out by multiplying the digital DAC input by the reciprocal of the gain error. The offset error can be removed by adding the inverse of the measured offset error to the digital DAC input. The equation below shows how to calculate
the correct DAC input to produce the desired voltage:
where:
Figure 3. EVAL-AD5676 output error in LSB with NoCal.
Note that offset error can be positive or negative. Also see the “Open-Loop Calibration
Techniques for Digital-to-Analog Converters” Analog Dialogue article.
How To suCCessfully CalibraTe a DaC signal CHain In this section we will describe how to calibrate offset and gain in a DAC signal chain in practice, using the AD5676R as an example. For all the measurements, the EVAL-AD5676 evaluation kit has been used with the AD5676R internal reference enabled. The EVAL-AD5676 board and the measurement setup are both part of the signal chain we are measuring in the example. Each component of this signal chain (power ICs on the board, AD5676R, parasitics introduced by layout and connectors, etc.) is contributing to the system errors. The idea is to show how this system can be calibrated as an example for any other system of choice. An EVAL-SDP-CB1Z Blackfin SDP controller
board (SDP-B) is used to communicate with the AD5676R on the EVAL-AD5676 evaluation kit and an 8-digit DMM is used to
measure the output voltage of VOUT0. A climate chamber is used to control the temperature of the full system made of EVAL- SDP-CB1Z plus EVAL-AD5676 with the AD5676R using the internal reference. The EVAL-AD5676 is powered up as
Figure 2. DAC signal chain simplified diagram. Calibrating out gain and offset errors that are
constants with no external influences is a simple procedure in theory. The linear region of the transfer function of the DAC can be modeled as a straight line described by:
where: y is the output. m is the slope of the transfer function accounting for the gain error (shown in purple in Figure 1). x is the input to the DAC. c is the offset voltage (shown in blue in Figure 1). Ideally m is always one and c is always zero.
In practice they account for the gain and offset error of the DAC and, once known, they can be accounted for in the DAC input to achieve a number closer to the ideal DAC output.
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described in the User Guide and the link configuration is shown in Table 3. First the signal chain errors without calibration (NoCal) have been assessed for different temperatures. The output error has been calculated considering the difference in LSBs between the ideal value and the measured value at specific input codes. This error includes both the intrinsic and extrinsic errors of the DAC and
the overall signal chain on the EVAL-AD5676 board. The output error with no calibration is shown in Figure 3. The information needed to calculate the offset and gain errors and, subsequently, the correction codes resides in the transfer function. Two points are needed for that: one data point
close to zero-scale (ZSLIN) and one close to full- scale (FSLIN). The idea is to work in the linear region of the DAC. This information is usually
provided together with INL and DNL specs, most likely in the endnotes to the spec table. For the AD5676R, for example, the linear region goes from code 256 and code 65280. Figure 4 shows a diagram to explain the linear region of a DAC.
Figure 4. Unipolar voltage DAC transfer function and errors.
Once the ZSLIN and FSLIN codes have been
identified, we can collect the measurements needed for the calibration, which are the DAC voltage outputs at those two codes
(VOUT at ZSLIN and VOUT at FSLIN), plus a few other codes in between (¼ scale, mid- scale, and ¾ scale). The measurements should be collected at the operating temperature for the application. When
Table 3. ConfiguraTion of Jumpers on eVal-aD5676 boarD for DesCribeD measuremenTs
Link No. LK1 LK2 LK3 LK4
Position A A A A
January 2022 Instrumentation Monthly
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