search.noResults

search.searching

note.createNoteMessage

search.noResults

search.searching

orderForm.title

orderForm.productCode
orderForm.description
orderForm.quantity
orderForm.itemPrice
orderForm.price
orderForm.totalPrice
orderForm.deliveryDetails.billingAddress
orderForm.deliveryDetails.deliveryAddress
orderForm.noItems
high-performance computing Simon McIntosh-Smith, head of the


Microelectronics Group who is heading up the development of Isambard for GW4, explained that this project is focused on figuring out just how comparable this ARM system will be to an Intel- or IBM-based supercomputer. ‘What I wanted to do was move this on to


the next phase,’ said McIntosh-Smith. ‘We now need to try this for real, in a real production environment, so we can get some data that is not just created in the lab but derived from real applications as part of a genuine HPC service.’ ‘We are very interested in key metrics.


How does it perform like-for-like against all the other alternatives, Intel CPUs, Knights Landing, the Xeon Phi architectures, or the latest GPUs from Nvidia?’ In order to collect these key statistics, it


➤ Triendl went on to explain the main


challenges facing HPC storage, and how DDN is developing in-house technologies in order to overcome these challenges. ‘One is concurrency, the number of threads in a supercomputer today, and that is driven not just by compute nodes but GPUs, Xeon Phi and Knights Landing. File systems – regardless of whether they are built on top of flash or hard drives – have limitations that are in-built into developers’ thinking so application developers think, for example, that they have certain limitations for certain types of I/O.’ ‘IME is designed to fundamentally change the


way that I/O is handled by the storage system. In addition to providing a flash cache to speed up data movement and storage, it can also provide a fairly large-scale, high-performance flash cache, so you can have an efficient way of implementing flash at scale in front of a parallel file system.’ Te system aims to reduce some of the impact


of I/O, particularly for application developers who would sometimes need to limit the number of I/O threads to avoid bottlenecking performance of the application. ‘With IME developers don’t have to worry about having a single shared file, random or strided I/O,’ said Triendl. ‘Many of the patterns that were effectively banned from implementation are not things that developers need to worry about when using IME.’ However, Triendl was keen to stress that it is not just applications bound by complex I/O that can benefit from the use of IME. He explained that, if a developer does have an application that is running fine on a parallel file system, it can usually be accelerated to some extent purely because IME can handle concurrency better than a traditional file system.


16 SCIENTIFIC COMPUTING WORLD


THIS SYSTEM WILL BE CALLED ISAMBARD (AFTER THE LEGENDARY ENGINEER ISAMBARD KINGDOM BRUNEL, DESIGNER OF CLIFTON SUSPENSION BRIDGE)


‘Essentially IME does not care, it does not


object to this very high concurrency, partly because it is based on flash and partly because we are managing the I/O in a very different way than a file system. We do not deal with the same problems that a file system would need to deal with,’ concluded Triendl.


ARM arrives as a technology for HPC In addition, the announcement regarding the RIKEN system, another ARM-based supercomputer has also been recently announced through a collaboration between the UK universities of Bath, Bristol Exeter and Cardiff – collectively known as the Great Western Four (GW4) – in partnership with the UK Met Office and supercomputer manufacturer Cray. Tis system, which will be called Isambard


(aſter the legendary engineer Isambard Kingdom Brunel), funded through a £3 million grant from the EPSRC, will act as a tier-2 system as part of the UK’s HPC infrastructure. A tier-2 system is designed to test and develop applications on new hardware or emerging technologies to help inform the UK and the wider HPC industry on the potential for these new technologies.


is important for the GW4 team to try and limit the variation introduced when normally comparing different computing architectures. Te problem here is that each architecture has its own dedicated soſtware tools and compilers, so any comparison would need to take this into account. To limit this, McIntosh-Smith and his


colleagues plan to use Cray’s soſtware tools – as, once they have been optimised for ARM, they will provide the closest thing to a vendor agnostic platform. Tey also hope to increase the accuracy of the comparison by including small partitions of other computing architectures. ‘Tey will all be running the Cray soſtware


stack and they will all be connected to the same InfiniBand interconnect,’ stated McIntosh-Smith. ‘Tis will be because it allows us to do an apple-to-apples comparison. We can use the same compilers that compile for ARM or Intel, run the codes with the same interconnect and hopefully we can just compare the different performance figures.’ While ARM is an exciting prospect in HPC


today, it has taken a lot of work to adapt the technology originally developed for embedded electronics and mobile phones for full-scale supercomputing applications. McIntosh-Smith explained that, in his


opinion, the ARM HPC ecosystem has only just reached the maturity that requires full- scale production testing: ‘Te one important part that was missing was ARM-based CPUs that were in the same performance ballpark as state-of-the-art CPUs such as THE mainstream X86. ‘Tis year I think it is ready. Te one thing that is missing then is people who have real data – that is exactly what Isambard is about. We are not just evaluating it, we are helping to make it happen. Projects like Isambard act as a catalyst for future development,’ McIntosh-Smith concluded. l


www.scientific-computing.com


stocker1970/Shutterstock.com


Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32