Solar integration takes a page from the semi wafer CSP playbook
!
Figure 6. Circuit model of a solar cell.
increase the nominal power of sunlight).
Figure 6 shows the equivalent circuit
!
model of a solar cell. Shunt and series
Figure 4. Cross-section of a solar cell. resistances exist in the cell with the shunt
Figure 5. Packaging of solar cells.
resistance being related to either flaws in
than a bumping line). Each penny put into
the crystal or module interconnect—these
structures. For this discussion, the focus will
a solar cell adds to the cost; there are not
defects introduce a parallel resistance to the
be on cells.
multiple die to defray the expense, and solar
cell. Series resistances are primarily related
cells are more like flat panels in cost model-
to interconnect, with the resistance being
Basic solar cell
ing than silicon wafers. Hence, many of the
generated by contact resistance, metal resis-
A solar cell is essentially a p-n junction
traditional semiconductor processes, such as
tance and movement through the crystal.
diode (a cross section is shown in Figure
photoresist processing, evaporation, sputter-
The current-voltage characteristic of a
4). When sunlight strikes a solar cell, an
ing or RIE, have not been widely adopted by
solar cell is shown in Figure 7. The maxi-
electron-hole pair is created; when connect-
solar because these processes depend on die
mum current output is the short circuit
ed to a load, current flows through the load
count to reduce the expense. Furthermore,
current (I ), and the maximum voltage is
sc
imparting energy before recombining.
even the adoption of tools is different. Due
given by the open circuit voltage (V ).
oc
Solar cell metallization is based on
to the high volumes, solar is less sensitive
screen-printed silver paste. These lines are
to capital equipment expenditure price and
SEMI versus SOLAR
typically 100 µm wide. Once a solar cell is
more concerned with operating cost.
Despite their differences, the semi and solar
fabricated, it is then converted into a mod-
However, the solar industry is now look-
industries do have commonalities. On the
ule. Cells are connected with a solder-coated
ing towards packaging technology to reduce
semi end, the primary focus tends to be on
metal ribbon and connected in series with
costs. Low cost materials, interconnect and
the front end. Although multi-billion dollar
other cells. The cells are coated with a plas-
system integration can all play major roles in
fabs are not uncommon, the push to drive
tic (ethyl-vinyl acetate (EVA)), mounted in
the drive for solar to reach grid parity.
below 45 nm is taxing the cost-performance
an aluminum frame and sealed in by a low
ratio of what can be gained through silicon
Background
iron glass. A typical module or panel holds
processing
2
. Packaging offers a lower cost
72 cells and outputs 200W (Figure 5).
There are several different kinds of solar
solution in improving performance. Figure
cells, including silicon crystalline (single
8 shows the advantages of implementing
Solar cell performance
and multi), III-V, II-VI, and thin film
3D type packaging structures to supplement
Solar power output (ΔP) is given by ΔP = η
(amorphous Si, cadmium telluride (CdTe),
silicon performance.
* E * A where η is the solar efficiency (%), A
copperindium- gallium-diselenide (CIGS)).
Similarly, solar has focused on cell pro-
is area of cell and E is the solar energy irradi-
The thin film material is typically done on
cessing to gain performance; however, po-
ance on the cell (W/m
2
). Solar efficiency is
rolls or large panels, while the crystalline
tentially lower cost solutions exist through
qualitatively defined as the power output of
approach is a traditional semiconductor
packaging. The typical efficiency of a solar
the cell divided by the power input from the
format (silicon wafers). Thin films have
cell is 15.5%. A 0.5-1.0% improvement in
sun. Efficiency is determined by the perfor-
lower efficiency but potentially lower cost
cell performance is considered significant;
mance of the cell, whereas solar irradiance
per watt. Although less cost can be gained
however, this translates to a power increase
can be affected by packaging or system set
with thin films, the lower output requires
of 6.5%.
up (mirrors, sunlight trackers and lenses all
more surface area compared to crystalline
Figure 9 shows a breakdown of solar ef-
ficiency based on cell performance. The
Semi Solar
!
Packaging requirement Density, pitch, resistance, Resistance, power
capacitance, inductance
Throughput 50,000 wpm 1500-2000 wpm
Cost distribution Multiple die Single element
Patterning Resist-based Screen printing
Feature size (µm) 0.045 100
Equipment Depreciation sensitive CoO sensitive
Figure 7. Current (I)–voltage (V) output of a solar
Table 1. Comparison of semi and solar requirements. cell.
www.globalsolartechnology.com Global Solar Technology – March/April 2009 – 7
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