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energy efficiency in HPC


is possible on the memory side on the path to exascale’ at ISC’12, the supercomputing conference in Hamburg in June.


Iceotope offers convective cooling via 3Ms Novec


second Semiconductor CIO Forum in Europe during which, among other things, it introduced new developments in its Green Memory initiative – in particular its 20-nanometer class DRAM technology in combination with advanced enterprise SSD. In many commercially important computing applications, such as virtualisation and web hosting, memory utilisation ‘is very power sensitive’, according to Peyman Blumstengel, strategic business development, who specialises in Green Memory for the company. Te CPUs and graphics tend to be larger consumers of power in HPC applications, he added, but even here ‘HPC sets high expectations in the power consumption of memory. Space and power consumption matters. In HPC, every Watt saved in memory can go to the CPU; every Watt they can save matters to them.’ He noted: ‘Samsung is at the beginning of


the whole value chain going from component provider to the end users. We have a technology leadership that we need to translate into a language so that the end user says “Yes, that is something I can experience in my own applications”, in terms of time or cost savings.’ Samsung is working with its partners, he said, to show how to leverage the investment that the company had made in green memory to be passed over to end users. Tomas Arenz, Samsung’s associate director


for marketing communication EMEA, added: ‘We are able to offer power savings on the memory side of 40 to 67 per cent. Te second thing is cooling, getting rid of the heat. We are able to take 30 per cent of that pain out of the box, because we generate 30 per cent less heat.’ But he too felt that there was ‘some kind of awareness problem in getting this information on the radar screen of the people who are deciding the power specification of the systems.’ In many universities, for example, the end users do not even see the power bill. ‘Te awareness simply isn’t where it should be,’ he said. Like others, he predicted that exascale developments would bring energy efficiency centre-stage and Samsung will be presenting ‘what we think


34 SCIENTIFIC COMPUTING WORLD


Energy-efficient processors Towards the middle of May, at its GPU Technology Conference in San Jose, California, Nvidia announced the latest in its Tesla product line for high-performance computing. Te Kepler 20, which will be available later this year, offers a three-fold improvement in compute performance per Watt over earlier generations. Sumit Gupta, senior director of Nvidia’s Tesla GPU Computing HPC business unit, predicted that the performance per Watt of the new Kepler chip meant that it would be possible to build a 1 petaflop machine with just 10 racks of servers and a power consumption of just 400kW. He said: ‘Tis puts it within the reach of any university in the world – for their general computing needs.’ Nvidia has been a trailblazer for alternative


chip architectures being considered for HPC, according to Simon McIntosh-Smith, head of Micro-Electronics Research at Bristol University in the UK. He is one of the driving forces behind the Energy Efficient High Performance Computing (EEHPC) network. Tis grouping of researchers and developers in academia and industry want to apply technology from the embedded space to high-performance computing. Te processors in mobile phones and tablet computers have always had to be energy efficient, so as not to drain the batteries in hand-held devices. With Linux now pervasive,


according to Dr McIntosh- Smith, ‘it is easier today for people to move from one architecture to another than it has been in the past 20 to 30 years. And what’s the obviously fast-growing space with lots of engineering effort and development going into it? Mobile processors. We’re all buying our smart phones and our tablets, so there are billions of energy-efficient, faster and faster processor chips.’ He cited the European Mont-Blanc project to build a supercomputer using ARM processors, but noted that there are lots of other,


Further


AppliedMicro www.apm.com


smaller projects going on to try other things out, including a PRACE project employing Texas Instruments DSP processors. Using such chips will require massive


parallelisation, which has implications for legacy soſtware, but Dr McIntosh-Smith sees this as a quantitative rather than qualitative issue: ‘Te soſtware question is massive and mostly unanswered regardless of any hardware solution we can find for the future.’ Even were it possible to build energy efficient supercomputers in the future, using entirely x86 architectures, ‘we are still looking at millions and millions of cores – that will be the least parallel system we will have to deal with. ‘At the other end of the extreme, systems that


information


Bristol University www.bris.ac.uk


Cray www.cray.com


The Energy Efficient High Performance Computing (EEHPC) network


www.EEHPC.com


Green Revolution Cooling www.grcooling.com


Hardcore Computer www.hardcorecomputer. com


Iceotope www.iceotope.com


Mont-Blanc www.montblanc-project.eu


Nvidia www.nvidia.co.uk


Samsung www.samsung.com/global/ business/semiconductor


Texas Advanced Computing Center


www.tacc.utexas.edu


Texas Instruments www.ti.com


are entirely GPU with no host – so very, very lightweight cores – might have one or two orders of magnitude more parallelism. Most people are expecting some hybrid, but we have got to work out how to harness millions of cores – going lightweight makes that only slightly harder.’ But will novel architectures really make a significant impact on energy efficiency in supercomputing in the short term? Dr McIntosh-Smith noted: ‘One of the first companies to be doing 64-bit ARM chips is AppliedMicro in the USA. Tey are doing a server chip with four heavyweight 64-bit ARM cores – this is a serious quad-core server chip, with multiple memory interfaces and multiple I/O ports. Te whole chip running flat out consumes 10 to 12 Watts. ‘Tat’s about an order of


magnitude more efficient than a quad-core chip you can buy today. It feels like there is a factor of 10 to be had already from the first attempt at using these more efficient architectures. Tey are calling their chip X-Gene and are planning to have first hardware towards the end of this year. ‘I think the next Mont-


Blanc stands a chance of being in the Top500. It may not be high in the Top500 and it might be a prototype, but there’s a good chance it will be there within 12 months. ‘We are then looking for


major systems vendors to get behind the technology in a serious way, so in several years perhaps,’ he concluded.


www.scientific-computing.com


Iceotope


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