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industry materials
rhombus4
High challenge that can only be addressed
magnification from a materials perspective.Although Atomic force micrographs of the GeOI surface. (a) depicts a 1x1um scan
electron silicon has long been established as and (b) depicts the corresponding 10x10um scan. The root mean square
microscopy the de-facto standard semiconductor (RMS) surface roughness values are 0.55nm and 0.5nm respectively.
(XTEM) image material, germanium, the material
of a 20nm from which the first transistor was
GeOI substrate made, offers substantially higher channel to increase the saturation The hybrid approach provides a
electron and hole mobility and velocity and maximize drain currents virtual germanium substrate on top of
consequently can achieve far higher in MOSFETs, while minimizing a silicon substrate which means that
operating speeds, for a given device leakage currents and power the enhanced mobility performance
dimension. dissipation for technologies scaled to that can be achieved in partially or
16nm and beyond’ fully depleted germanium devices can
Traditionally, silicon has become the be produced using established,
material of choice because of its In order to address such stringent “CMOS safe” production processes
relative abundance and lower cost as requirements, engineers at IQE’s and can employ the same range of
well as its mechanical strength and manufacturing plant in Cardiff, UK dopants used in standard silicon
its excellent native oxide SiO2 that have developed a new range of processes. The engineered
forms an ideal insulating interface engineered substrates including substrates therefore allow device
with silicon. germanium on insulator (GeOI). designers to look beyond the
Engineered GeOI substrates are performance constraints imposed by
Germanium by contrast is a brittle produced using a unique layer existing silicon technologies to push
material with poor native oxide transfer process from a ‘proprietary the boundaries of future CMOS
properties and, being a less common lattice matched substrate’ to produce devices for generations to come.
commodity is comparatively a material with extremely low
expensive. However, the recent defectivity levels and excellent across Additionally, the inherent photonic
introduction of deposited high-k gate wafer thickness uniformity. The GeOI properties of GeOI also provides a
dielectrics to replace the traditional subtrate is manufactured using potential platform for advanced,
silicon dioxide, now affords the conventional epitaxial growth multi-junction photovoltaic devices for
superior electronic properties of techniques, which eliminates the use high efficiency solar cells.
Germanium a new lease of life within of bulk Germanium wafers, and offers
mainstream CMOS manufacturing. a cost effective solution to future
CMOS requirements. Removal of co-
Beyond the 22nm device node, the transferred material is achieved using
ITRS roadmap has predicted the highly selective etch methods
Plan view development of ‘new materials to resulting in smooth Germanium
electron replace silicon as a alternate device layers with excellent across wafer
micrograph thickness uniformity and extremely
(PV-TEM) of high crystal quality. Typical
the GeOI Germanium layer thicknesses are of
substrate. No the order 10-100nm, with an across
defects are wafer thickness uniformity of ~3%
observable and a surface roughness of 0.5nm.
within the The thickness of both the final Ge Nine point spectroscopic
measurement device layer, and the buried oxide ellipsometry (SE) map of the
detection limits layer, can be tailored to suit the GeOI substrate, indicating a Ge
(< 10
5
cm
-2
) specific application. thickness uniformity of 2.8%
32
www.compoundsemiconductor.net September 2009
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