Cover story
Edge computing – secure IoT system design with PolarFire SoC and FPGAs By Krishnakumar R, Senior Marketing Manager, FPGA, Microchip Technology
I
t is expected that by 2025 there will be over 25 billion IoT devices, transmitting almost 80 zettabytes of data, which could have profound
effects on IoT deployment. In a traditional IoT system, dumb sensor nodes – called edge devices, gateways or aggregators – sense information and communicate it to cloud servers, either directly or via a gateway. These servers then analyse the data, make inferences and communicate instructions back to the edge nodes. In this topology almost all security
is built around the servers where the intelligence is hosted – edge nodes and gateways are typically not secure. With 25 billion IoT devices transmitting zettabytes of data, this topology will be slow and inefficient; the intelligence must be distributed across the network to reduce traffic and improve latency. For example, with an edge device that performs lane detection for a car, there is no time to capture images from the lane, communicate it to a server and get a response about whether the car should move left or right. Intelligence needs to be built into the car to analyse the lane conditions and take decisions then and there. When intelligent edge nodes are
used everywhere, their security becomes paramount, making it vital for IoT systems to implement end-to-end security.
Security traps Any system is only as secure as its weakest link. This means that securing an IoT device should also be about securing the entire supply chain – from the chip manufacturer, through to the OEM who uses their products, and then the end user. All these stages are security risks.
For the chip manufacturer these include Trojan horses in the hard IP, in the IC
design or in the semiconductor mask. There is a danger of overbuilding or stealing wafers, wrong keys being injected in the devices, failed devices being sold, used parts being refurbished or even fi nished goods being stolen. There is also the possibility of a Trojan horse being introduces in the soft IP at the OEM stage, or in an FPGA, or even EDA tools being compromised. At the OEM’s site, risks include wrong
keys or confi gurations loaded into the system, or the contract manufacturer could again overbuild or reverse engineer the product. Third-party clones could be introduced into the network, weakening overall security. And fi nally, when products are in the
fi eld, it is vital that the data is secure and encrypted and communicated as such. Essentially, unless the entire supply chain of every system in the network is secured, none of it is secure.
Three-layer security Security can be looked at as having three layers – hardware security, design security and data security; see Figure 1.
Hardware security To ensure secure hardware, Microchip’s SoCs and FPGAs have a cryptographically-controlled supply chain. From the wafer sort facility, a FIPS 140-2 level 3 certifi ed Hardware Security Module (HSM) performs authentication at the wafer level. Once done, the HSM wraps unique secret keys into every single die within the wafer using the die’s PUF, a Physically Unclonable Function. This is done before it is sent across to package and test.
At package and test, each packaged
device exports a serial number and its ECC public key to the HSM, which authenticates each individual IC with the factory keys that are programmed
06 November 2023
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into them. It then injects a signed digital certifi cate within each chip before it is shipped to the fi eld. OEMs can verify the device integrity during their manufacturing process. OEMs and end customers get a
secure production programming solution or SPPS, allowing customers to ensure that their supply chain is also secure. With the SPPS, OEMS can control
overbuilding and ensure that the FPGAs are authenticated before programming, preventing counterfeiting.
Design security Microchip’s SoC and FPGAs protect customer designs. In the PolarFire FPGA block diagram in Figure 2, the yellow block is the system controller, with its own crypto coprocessor that handles DPA-resistant bitstream decryption. The system controller has its own private and secure non-volatile memory locations to store keys and ensure that the entire operation is DPA safe. The system controller PUF protects the keys, secures memories and protects against cloning. IoT devices also need protection
against physical attacks. Microchip FPGAs and SoCs have tamper detection that detects attacks and raises alarms to the system controller, microprocessor subsystem and the FPGA fabric. A designer may either erase user data including keys, erase user data and factory keys, or completely brick the device by erasing the information of the entire device.
Data security Intelligent edge devices may need to communicate sensitive information, so IoT systems need to implement data security to protect it. The PolarFire SoC and FPGA
families include devices that support data security. These devices include an Athena TeraFire EXP-5200B DPA
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