Feature: Aerospace, Military & Defence


Useful qualification tools and approaches Figure 1 shows how statistical tools are used to ensure that the components pass pre-testing and fall within the qualification specification limits (between upper and lower specification limits). It’s also crucial to assign a unique serial number to each unit during pre-testing. For larger quantities, an electronic die ID is preferred for


easy data comparison between pre-test and post-test. A driſt of less than 10 per cent from the pre-test limit is considered a pass, which requires invoking the electronic die ID during qualification testing. To distinguish between device failure and test repeatability issues, a control unit is cycled through the same test sequence 50 times. If it passes all 50 times, it confirms test stability. However, if it fails aſter a few insertions, it suggests a test repeatability issue, warranting further investigation. Analysing post-stress data helps identify potential test-related problems. If found, the test programme needs optimisation, rather than labelling it as a device failure. For complex devices like Analog Devices’ Apollo MxFE AD9084, it’s vital to run control units even during high temperature stress testing. Given that it runs at 37W, separate control units can safeguard against potential power supply issues. Another common mode of device failure is voltage transients


during power rail switching. When the power rail is switched on there may be power glitches in the first few milliseconds that may damage the device. If there is a power interruption in the reliability lab and if the power generator is to be turned on, there are chances voltage transients may occur, which may in turn damage the device. Tis is known as electrical overstress (EOS). However, to prevent this mechanism, one of the simpler procedures is to add a transient voltage suppression (TVS) diode. Te TVS diode is added as a shunt in the power supply path. If a voltage transient occurs, the TVS diode activates first, preventing EOS damage and effectively reducing device failure during qualification.


Figure 2 shows a TVS diode in action, preventing a power


glitch and adverse effects on the component. Prevention such as this can help avoid requalification, schedule delays and spending of extra resources. In the development of the Apollo MxFE AD9084, preventing these factors were key design considerations. During qualification, another type of failure that can occur is


related to moisture sensitivity levels (MSL) stress. Tis stress is typically preceded by a confocal scanning acoustic microscopy (CSAM) study during the reflow and bake process. MSL is also referred to as a package level qualification stress. Sometimes, CSAM images reveal die delamination aſter the stress and post- etest phase. CSAM is a quick, non-destructive analysis technique that uses ultrasound waves to detect changes in acoustic properties within integrated circuits and similar materials. According to the JEDEC standard, if the die delamination


between the epoxy and die exceeds 10 per cent, it is considered a failure. One way to prevent this is to perform a CSAM and thru-scan analysis during the qualification process. Tru-scan, also known as acoustic microscopy in transmission mode, is particularly effective at detecting delamination at the die-attach interface. To further prevent die delamination, it’s important to


consider two factors. First, check the epoxy and curing profile temperatures to ensure they are within the appropriate range. Second, during the assembly process, especially if a high-pressure wash was involved, confirm that it effectively removed all flux residue. Additionally, selecting the correct MSL level is crucial. For laminate-based packages, targeting MSL 3 is advisable. Using MSL levels 1 or 2 can lead to failures. For larger electronic packages such as a 10mm2 × 10mm2


thin quad flat package (TQFP), opting for an MSL level of 3 is preferable over MSL 1 to reduce the risk of die delamination and potential device failure.


Helpful qualification tests A leakage test is an important pre-etest sequencer that can help to


Figure 2: TVS diode for power glitch prevention www.electronicsworld.co.uk May 2025 33


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