Feature: Power
switching resumes, degrading efficiency. With forced ZVS, soſt switching
continues even at very light loads. When the valleys and crests become impossible for conventional flyback to detect, the ZVS PSR controller enters a different mode of operation that turns the ZVS MOSFET on aſter a fixed period of time. Tis allows a small amount of current to be injected into the power transformer. When the ZVS MOSFET turns off, this
energy is rectified and recovered at the primary side, discharging the drain node and thus reducing the primary MOSFET VDS
to
Figure 3: QuarEgg reference design with PSR and forced ZVS for greater low-load efficiency in fixed voltage applications
zero. Tis allows the circuit to maintain ZVS turn-on at low load, which enables the main MOSFET to continue switching at sufficient frequency for primary-side monitoring to be effective, whilst allowing relatively high conversion efficiency. Figure 3 shows the schematic of the PSR
flyback with forced ZVS, managed with the latest QuarEgg controller. PSR delivers a very flat idle-to-full-load efficiency curve, ranging from 91% at low load to over 94.2% at maximum power. Tis architecture with forced ZVS significantly reduces total operational losses when compared with conventional ACF and QR techniques. Figure 4 shows how this new design
Figure 4: PSR flyback converter with forced ZVS ensures > 90% efficiency at sub-10% load
the controller can’t detect this until the next sample is taken, which deteriorates transient response. Moreover, because the magnetic field only contains output voltage information during switching, voltage regulation is impaired at no/low load. Increasing the switching frequency can address this problem, but in a conventional QR circuit that reverts to hard switching at low load, which significantly degrades efficiency. An alternative approach is to add a large
output capacitance to stabilise the output voltage when feedback is not available. Tis, does, though, add to cost and bulk. It should be noted that when Eggtronic controllers are placed on the primary
32 June 2024
www.electronicsworld.co.uk
side (in the case of fixed voltage power adapters) or secondary side (as with the Power Delivery reference designs), there’s no need for optocouplers. Tis is because the controllers embed a digital isolated communication peripheral compatible with both an inductive and a capacitive link, that can be used to drive the FET on the other side of the barrier.
PSR with forced ZVS An approach that leverages the forced ZVS concept now enables PSR converters to maintain efficiency at low load. At about 20-25% of full load, or less, conventional QR operation struggles to distinguish between valleys and crests. As a result, hard
delivers consistently high efficiency, always above 90% across the entire load range. Peak efficiency is 94.2%, whereas the best conventional converters today deliver about 91%. Light-load/no-load losses are reduced by 50% and the efficient, low- cost design without optocoupler or large output capacitors also affords dramatic size reductions.
It’s an evolution Basic flyback architecture continues to evolve, offering designers new configurations to satisfy the needs of diverse applications and markets. Low cost, small size and high efficiency are perpetual demands, which can now be met using QuarEgg controllers. Primary-side and secondary-side regulation with forced zero voltage switching maintains efficiency above 90% across the load range from under 10% full load to over 75%, as stipulated in the latest ecodesign codes, both in fixed voltage and USB Power Delivery applications, at every input voltage.
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