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Feature: Processors


Figure 2: A neural network implementation with Transfer Learning technique in a digital standard node vs the NASP hybrid solution that uses an analogue circuit


the neocortex are fixed at a very early stage of a person’s development and do not change for their entire life. Te same is true for the hearing system, which includes both the ears and the auditory parts of the sensory system. Te active state (always-on) located in our ear detects and extracts sounds, which the brain interprets. Figure 1 shows the human perception


of voice according to Karl Friston’s theory: there are “blanket states” of the peripheral cortex (the human retina and ear), reflecting direct perception of information, which are always on, and transfer information to the brain hemispheres for classification. Since these blanket states do not change, they have a “fixed neuron connection structure”. Te output coming from those blanket states in AI terminology is called “embeddings” – they are representations containing densely- packed information about sensory input


formed by a neural network or biological nervous system. Embeddings are formed in hidden layers of a neural network and contain the most significant information about input data. Tey are then used as input data for improved processing, classification and interpretation.


Neuromorphic analogue signal processing Neuromorphic analogue signal processing technology, or NASP, perceives raw data signals to add “intelligence” to various sensors. Te architecture contains artificial neurons – nodes performing computations, implemented with operational amplifiers, and axons – the connections with weights between the nodes, implemented in thin- film resistors. NASP chip design embodies the


approach of a sparse neural network, with only the necessary connections between neurons required for inference. In contrast to in-memory designs, where each neuron


20 July/August 2022 www.electronicsworld.co.uk


is connected to each neighbouring neuron, the NASP approach simplifies chip layout. Tis design especially suits Convolutional Neural Networks (CNN), where connections are very sparse, as well as Recurrent Neural Networks (RNN), transformers and autoencoders. Te NASP T-Compiler converts the


already trained and optimised neural network math model into the chip structure, offering area utilisation close to 100% (in practice it can be exactly 100%), and 8 bits per weight with current technology. Tis approach yields a faster time to market, lower technical risks and better performance. Furthermore, NASP proposes a hybrid-core approach, similar to that described in the latest neuroscientific works on human brain data processing. NASP technology combines the fixed


weights method, which implies complete separation of inference and training, with a fixed chip structure, similar to


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