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ARTIFICIAL INTELLIGENCE FEATURE All in the mind Neural networks change computing


The convergence of big data, fast hardware processing and advances in artificial intelligence (AI) algorithms have accelerated the adoption of AI. One of the core advancements driving this surge is the emergence and evolution of neural networks - software models that are intended to mimic (in a simple fashion) how neurons behave in the brain. Blaize discusses the potential of and the challenges facing these neural networks


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eural networks (NN) are extremely powerful, but deploying them in real-world applications has challenges: • Neural networks need to run efficiently, close to where real-world data is collected and stored; these environments can constrain computing, memory and energy resources.


• Neural networking architectures, models and methods evolve very rapidly, and developers need to be able to update their models easily and quickly.


There are different neural network architectures to accommodate the wide range of AI tasks that need to be performed. But, every neural network has one common feature: they are all structured as graphs. The high-level frameworks used for creating and training models are already graph- oriented. Yet, the underlying hardware used for inference has been stuck in the past. Much of the development effort in implementing a NN model involves adapting the graph to a non-graph architecture; this means both longer development cycles and less efficient processing in the finished product. Neural networks consist of multiple layers, each of which has multiple nodes. Processing starts at one end of the network, proceeds through all of the layers, and terminates at the other end of the network. Within each node resides a small computer programme, sometimes referred to as a kernel. The kernel performs the functions of that node, manipulating weights and inputs. The outputs of one layer - also known as activations - become the inputs of the next layer. Each layer is designed to extract some feature, such as lines or shapes from images, and as the layers progress, the neural network graph gets built to progressively extract higher level features, ultimately identifying something in the input.


Existing processors such as CPUs, GPUs, FPGAs, DSPs, as well as newer, fixed


function solutions, were not built to process neural network graphs natively; when processing neural networks, different architectures encounter different challenges. Firstly, there’s the figurative hitting of the memory wall. Traditional architectures that are not graph-oriented cannot leverage the structure of the graph and the relationships between nodes. So, when processing each node in the graph, they must send intermediate results to external memory and then fetch it back later for processing the next node. This creates a significant amount of extraneous data movement, limiting performance, and increasing latency and power consumption.


Then there’s the lack of true task parallelism. Neural network processing lends itself to four different levels of parallelism: instruction-level, data- level, thread-level, and task-level. The first three are available in some form in most current architectures, but none of them offer task-level parallelism. True task parallelism allows multiple nodes and threads to be in play at any given time, with balance in the production and consumption of data through the graph, enabling efficient streaming. Streaming eliminates a huge amount of data movement, saving power and time that would have been needed to move the data in a different architecture. Additionally, consider programmability: different architectures support different levels of programmability, from high level software to hardware-level. None of the previously-existing architectures allowed developers to programme a high-level graph in software, and also have that programmability translate all the way through to the hardware architecture efficiently. A unique characteristic of machine learning (ML) is that models are fluid, remaining so even after deployment. This calls for system flexibility, so that the model can be updated


/ ELECTRONICS


easily and consistently, both during development and after release. Such flexibility requires full programmability. Blaize’s Graph Streaming Processor architecture, or GSP, is a graph-native architecture built to address the challenges in efficiently processing neural networks, and building complete AI applications. With a fully programmable graph streaming architecture, GSP chips process graphs more efficiently than CPU/GPU architectures. As a result, the GSP architecture enables developers to build entire AI applications, optimise these for edge deployment constraints, run these efficiently in a complete streaming fashion, and continuously iterate to keep up with rapid evolutions in neural networks.


Blaize’s Linux PC-based development station, running the company’s Picasso software


Blaize www.blaize.com


ELECTRONICS | APRIL 2020


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