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NEWS


How do you verify IC performance?


As demand for complex ICs continues to grow, suppliers face increasing pressures to deliver only the highest quality ICs in as little time as possible. Here, Ross Turnbull, director of business development and product engineering at ASIC design and supply company Swindon Silicon Systems, explains the importance of test engineering in delivering custom ICs to meet rising demand.


W


hen it comes to ICs, test procedures can quickly become complicated. Producing high volumes of intricate electronics means there is a lot of room for error. Any faults, whether because of design oversights, manufacturing issues or a combination of the two, may result in suboptimal chip performance. To minimise this risk, regular and rigorous testing is therefore a standard requirement in the IC manufacturing process. This applies to standard ICs, but requires more consideration when it comes to bespoke chips.


Where testing is often treated as a compartmentalised step that is separate from the rest of the manufacturing process, the approach in ASIC manufacturing is different. Instead, testing should be conducted throughout the entire project workflow, even at early prototype stages. The earlier any faults or non-conformance can be identified, the more quickly remedial action can be taken.


Delving into production test How do you go about testing a custom IC? The production test step, a crucial element linking the prototype and full production stages, involves both wafer and package level testing. Here, the aim is to identify any devices that do not meet the required specification and, if possible, diagnose the reason why.


A variety of automatic test equipment (ATE) is used to perform tests on the IC or device under test (DUT). The ATE may be comprised of one or more different test instruments, both real and simulated, to test and measure ASIC performance. This may include the measurement of voltage, current and resistance parameters, as well as signal


voltages, distortion and RF signal generation, depending on the customer requirements and application. Test sequences and patterns are determined automatically, in a process known as Automatic Test Pattern Generation (ATPG).


Combining ATE with ATPG minimises the amount of test time needed to verify the performance and functionality of each device. Fully automated testing ensures fast, repeatable testing with high coverage. It is a better use of engineers’ time; rather than needing to invest significant resource in manual testing, experts can instead focus on fixing individual issues as they appear.


Wafer probe


Another key element of the production test step is wafer probe. Here, the entire wafer is put under test, across both hot and cold temperatures. The wafer is placed on a prober, which makes electrical connections between the individual ICs on the wafer and the test equipment. This test equipment may be operated manually or with ATE. The key benefit of wafer probe is that it allows for statistical tests to be carried


8 JULY/AUGUST 2024 | ELECTRONICS FOR ENGINEERS


out that are not possible during the later package test phase. This includes part average testing (PAT), in which a sample of chips on a wafer is selected and tested as a group to determine average performance. Any chips offering suboptimal performance at this stage can be quickly identified. Not only does wafer probe save the cost of packaging unusable chips, but also helps to minimise field failure rates of the product.


Making testing easier It is clear that IC testing isn’t always a straightforward process. How can we go about simplifying it? Here, ASIC suppliers opt for a Design for Test (DfT) approach. With DfT, test regimes and coverage are considered right from initial IC design. Not only does this allow for faster test times for lower piece cost, but it also means that test parameters can be tailored exactly to the IC specification. This way, the ASIC designer can fully verify the performance of the device before it has even left the plant, facilitating successful integration of the final ASIC into the customer product.


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