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RESEARCH REVIEW


FETs: Double heterostructure boosts breakdown, cuts costs


Switching from a conventional FET to a AlGaN/GaN/AlGaN structure increases breakdown voltage and trims buffer thickness


RESEARCHERS from National Chiao- Tung University, Taiwan, are claiming to have reported the first device comparison of conventional and double- heterostructure GaN FETs fabricated on 150 mm silicon.


Corresponding author Edward Yi Chang claims that one of the key findings of this effort is the significant increase in the breakdown voltage resulting from the insertion of an Al0.1


Ga0.9 N back barrier to form the double heterostructure FET.


“Furthermore, the double heterostructure FET greatly reduces the buffer thickness needed for GaN power devices.”


Turning to a thinner buffer, which reduces strain and simplifies control of wafer bow, could aid the manufacture of GaN-on- silicon FETs. “A recent study shows that it is difficult to consistently grow GaN on 6-inch silicon substrates, due to the thick buffer layer, which induces large strain on the 6-inch wafer,” says Chang.


Options for increasing breakdown voltage are by no means limited to the insertion of a double heterostructure, and often involve different device designs or improvements to the epitaxial structure.


“From the aspect of device fabrication, field plates, ion implantation and local silicon substrate removal are complicated,” argues Chang, adding that since the epitaxial structure governs device performance, it is this that should be optimised.


Like several other groups, the Taiwanese team investigated thicker epi-structures and carbon doping: “A thicker crack-free film is difficult to grow because of a large tensile stress,” says Chang, “while a carbon-doped GaN buffer can improve breakdown voltage greatly, but a specific on-resistance increase of the device is another serious issue.”


To evaluate their new design, the team formed conventional, single-


heterostructure FETs and double heterostructure variants by growing epitaxial structures on 675 μm-thick, 150 mm diameter silicon substrates using a Thomas Swan MOCVD reactor. This tool was equipped with a Laytec EpiCurve TT system for measuring the curvature and temperature of the wafer.


N barrier; while the double- heterostructure contained a 1.4 μm-thick back barrier made from Al0.2


Both types of device share the same foundation: a 200 nm-thick AlN nucleation layer and a 600 nm-thick section of various AlGaN transition layers. The conventional FET structure deposited on this consisted of a 2.6 μm layer of GaN, followed by a 27 nm Al0.2


Ga0.8 Ga0.8 Ga0.8 N barrier. N, a


55 nm-thick GaN channel, and a 27 nm- thick Al0.2


Room-temperature Hall measurements show that the control sample has a mobility of 1270 cm-2


V-1 s-1 carrier concentration of 8.5 x 1012 V-1 s-1


sheet carrier concentration of 8.7 x 1012


cm-2 .


Etching with an inductively couple plasma defined device mesa regions in the epiwafers. The addition of a Ti/Al/ Ni/Au stack created source and drain contacts, and a combination of nickel and gold formed the Schottky gate contact. Transistors that resulted feature a gate with a width of 100 μm and a


60 www.compoundsemiconductor.net June 2014


and a sheet cm-2


,


while the double-heterostructure variant has a mobility of 1110 cm2


and a


Chang and his co-workers are planning to improve wafer uniformity, fabricate double-heterostructure devices with an 80 nm gate width that should produce high output currents, and compare the reliability of conventional and double-heterostructure FETs.


Y. -L. Hsiao et. al. Appl. Phys. Express 7 055501 (2014)


length of 1 μm, and have a gate-to-drain and gate-to-source spacing of 4.5 μm and 1.5 μm, respectively. Using isolation patterns with a 5 μm gap, and defining the breakdown voltage as that at which the leakage current exceeds 1 mA/mm, the team determined a breakdown voltage for the single heterostructure FET of 170 V. In comparison, the breakdown voltage of the double heterostructure FET was more than 200 V.


Turning to isolation patterns with a 20 μm gap enabled a comparison of leakage currents at 200 V. The double- heterostucture FET leaked 9.2 x 10-5 6 x 10-3


mA/mm, compared to mA/mm for the control.


One weakness of the double- heterostructure FET is that its drain current density is just 475 mA/mm, which is more than 20 percent lower than that of the control. The team believes that this might be due to a lower carrier concentration.


The double-heterostructure has the same AlGaN barrier, but instead of a 2.6 µm-thick layer of GaN, it features a 1.4 µm-thick Al0.2


Ga0.8 N back barrier and a 55 nm-thick GaN channel.


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