Tooling up for exascale
Robert Roe investigates some of the European projects focusing on preparing today’s supercomputers
and HPC programmers for exascale HPC
tools and frameworks that will allow them to program the soſtware needed to exploit a billion, billion calculations per second. However, it is not just a case of installing
A
more hardware and running today’s applications. Much of the code that has been designed today will not work on exascale systems without considerable optimisation or large re-writes because of the highly parallel nature of exascale computing systems with complex hierarchical memory architectures. Mark Bull, application architect at the
Edinburgh Parallel Computing Centre, explains that this paradigm shiſt in HPC programming is down to the amount of parallelism that needs to be exploited to reach exascale. ‘Te only way we are getting more
compute power is to add more cores. Te consequence for that is more explicit parallelism in applications,’ said Bull. ‘Modern architectures are very
hierarchical, we have distributed nodes, each of those has multi-core processors that have hyper threads, SIMD units and potentially GPUs in them as well – so there is a big hierarchy of parallelism,’ Bull continued. To fully appreciate this change in
programing models, it is important to understand the history of HPC programming. In the past, the industry relied on increasing clock speeds to accelerate computing performance but Dan Holmes, applications consultant in HPC Research at the Edinburgh Parallel Computing Centre, highlighted that much of
24 SCIENTIFIC COMPUTING WORLD
s the HPC industry prepares for the next major milestone in HPC performance, exascale programmers must look at new
this comes down to power requirements of the underlying hardware. Holmes said: ‘Trying to increase the clock
speed, more than we currently are, can only get us to around 4GHz, the speed of many gaming PC’s or workstations on the market today. Eventually the thing is so hot that it melts the silicon that it is made of because you cannot dissipate the heat out of it fast enough. Tere is a limit on how fast each processor can be and therefore to get more capability you need more of them. ‘You want the electrical distance between
them to be as short as possible for power reasons and so you end up with small clumps of processors which are then grouped together in bigger clumps, and so on.’
Te result is a drastic increase in
performance due to the increasingly parallel nature of computing architectures, but this performance comes at a price: ‘If you have got more processors then you have problems with them communicating with each other,’ said Holmes. Te result is an increasingly complex
hierarchy of reasonably small processors working in tandem. Tis requires more intelligent programming to address distributed memory and highly parallel computing architectures that we see in HPC today. One concern for HPC programmers
working towards exscale is that these extremely large systems create different problems at certain orders of magnitude, as Holmes explained. ‘It is relatively easy to scale something to
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