HPC 2015-16 | Processors Te issue with FPGA technology is
that it necessitates the optimisation of data movement and computation on an application-specific basis. In a general- purpose HPC market that runs tens or even hundreds of applications across a cluster in a fairly short period, it is unlikely that HPC centres will want to switch off even a few nodes while they are optimised for a new application – let alone that entire cluster. ‘FPGAs have been around a long time,
and we have seen them in selected areas, but they have always been most successful in deployments that are focused on single applications, or a few applications. Tey have also been best deployed in areas that are highly scalable and generally for applications that are text or integer-based. Tey are not as strong on floating point applications that use fractional arithmetic,’ concluded Snell.
RISC Te RISC (reduced instruction set computing) processor architecture was originally developed back in the 1980s around a simplified instruction set that could potentially provide higher performance as it is capable of executing instructions using fewer microprocessor cycles per instruction. Te development of the early work
was done by two US universities, Stanford University and University of California, Berkeley. Stanford would go on to commercialise its work as the MIPS architecture, while Berkeley’s RISC evolved into the SPARC architecture. Developed by Sun Microsystems and introduced in 1987, the first implementations of SPARC were based on 32-bit operations and initially
Nvidia Quadro M5000 GPU designed for high-performance workstation based applications
designed to be used in Sun Microsystems server and workstation systems, replacing Motorola processors. SPARC international was eventually set up to license out the technology in the hopes of encouraging the development of the processor ecosystem. Te SPARC architecture was licensed to several manufacturers, including Texas Instruments, Atmel, Cypress Semiconductor, and Fujitsu. SPARC processors have seen many
implementations since those early days, but Fujitsu has had perhaps the most success with the RISC based SPARC architecture to date. Having developed its line of SPARC processors, the latest – the SPARC64 VIIIfx 8C 2GHz – was used in the K computer, which as of the June 2015 release of the Top500 is still ranked as the fourth most powerful supercomputer in the world today.
The Amdahl spectrum In HPC, the days are long over when users could just wait for the next CPU to deliver a 50 per cent increase in application performance. Now they must look to more
innovative, architectural advances which require an understanding of parallelising code and how to map that efficiently to specific accelerator technologies. Rajeeb Hazra, VP of Intel’s architecture
group and GM technical computing, said: ‘We are starting to plateau, not as a company with a product, but as an industry on how quickly we can build performance with the old techniques, by just increasing the frequency.’ Interestingly, for a representative of what is regarded as a hardware company, Hazra placed his emphasis on soſtware, stressing
“What we need is a family of solutions that covers this entire spectrum of applications Images”
that the key to increasing performance is first to identify clearly which sections of code can be parallelised and which cannot. Hazra said: ‘Amdahl said the world is not
all highly parallel or highly serial; there is a spectrum and the amount of performance gain you can get through parallelism is gated by the proportion of how much is parallel and how much is serial in an application.’ He concluded: ‘Tere are many
applications that are highly parallel and there are some that cannot easily be parallelised. So what we need is a family of solutions that covers this entire spectrum of applications and this is what we call the Amdahl spectrum.’ Te future of HPC is no longer a
Intel Xeon Phi coprocessor 5110P/3000 series based on Intel Many Integrated Core (MIC) architecture 18
monoculture of clusters of commodity hardware but rather a highly diverse ecosystem, populated by different processor technologies, different architecture, and different soſtware solutions. It may be messy, but it will be interesting.l
Intel
Nvidia
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