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HPC 2017-18 | High-performance computing


and the scalability through I/O communication are both concerns for future system designers. Tis issue was described by John Goodacre,


professor of Computer Architectures, Advanced Processor Technologies Group at the University of Manchester and in a presentation as part of a workshop at the Infrastructure for the European Network for Earth and System Modelling (IS- ENES) – another FP7 funded project. In the presentation, Goodacre noted that while the von-Neumann model was fundamental to many of today’s systems, it did have certain limitations as we approach exascale computing. While the memory bandwidth problem is


significant, Goodacre lists several approaches to overcoming this challenge by increasing processor efficiency. Tese range from SIMD or vector machines, DSP, GPGPU, hardware accelerators or FPGAs as possible solutions. Te EuroEXA project chooses FPGA


acceleration and lays down several steps to creating a new computing architecture leading to the creation of commercial systems in approximately 2023. Te EuroEXA project, which builds on several earlier projects, Euroserver, ExaNODE, ExaNeSt, ECOSCALE aims to lay the building blocks for a European exascale system by creating a new computing architecture based on an ARM/FPGA hybrid processor, dubbed the ‘ICT-42 EuroProcessor.’ Tis project will evolve through several


phases, from designing the processor and node architecture, through to the interconnect technology and eventually OS, runtimes, programming models and application development. However, designers must be careful not


to create something which cannot be easily adopted by other users and this must be a clear thought from the outset, as the project is already considering potential commercialisation of these technologies once the initial exascale systems have been deployed. Across the pond, the DOE is dealing with


similar challenges. ‘We want to build a soſtware stack that will support a broad set of applications and that will have a life beyond the end of the exascale project,’ said Messina. ‘In other words, it would serve as the


foundation, for some time aſter, for many applications to be able to take advantage of exascale. One of the broad goals is to come up with a soſtware stack that can be used on medium class HPC systems, as well as exascale. People can adopt this soſtware stack in order to make it easier to transition to higher and higher levels of performance,’ Messina added. While the EU and US exascale plans revolve around particular architectures or soſtware stacks


18


Portability is an important target or goal for applications, especially some performance portability, because there will continue to be more than one architecture in the lifetime of an application


that are being created specifically to bridge the hurdles needed to obtain exascale application performance, their efforts will be felt by HPC users across the globe as the technology, architecture and soſtware design provide blueprints for other HPC users who wish to pursue their own exascale journey. Investment from US government funding US companies will surely benefit a worldwide community of HPC users, and this is also true of European efforts funded by European countries as part of the European Commission’s efforts to accelerate computing efforts on the other side of the Atlantic. ‘In recent years, if one is running HPC on a


medium-sized cluster the soſtware environment tends to be somewhat different from what you have for the leading-edge systems. Tat has been an obstacle that people have surmounted but we would like to lower the effort required to do that,’ said Messina. Te hope from the US investment programme


is to provide an ecosystem which can then support further development in the future. Tis is done through widespread adoption of tools and architectures that help to drive expertise and knowledge around a given technology, language or programming model. Tis development should provide a trickle-down effect to users who are not targeting exascale but can still take advantage


of the same tools and methods for HPC. Another aspect that Messina was keen to


highlight was that another secondary goal would be to streamline some of the approaches to programming that are dealing with similar issues. ‘Applications have, for very good reasons,


adopted different approaches and algorithms and it is difficult for a community to converge to a single solution,’ commented Messina. He gave one example of parallel I/O, explaining that different groups had their own approaches but it would be beneficial to converge if such a process could support all the required applications. ‘I/O is just one of the examples, another would


be common runtime API that could support tools like performance measurement tools, visualisation tools, or even compilers. ‘In the long run, there would be substantial benefits for the high performance computing community if there were fewer choices, so long as they properly support the applications,’ commented Messina. Performance portability is another key aspect


to the project, as it will help to ensure value in the work that has been done by the ECP partners. As Messina notes, ‘portability is an important target or goal for applications, especially some performance portability, because there will continue to be more than one architecture in the lifetime of an application. Tere will probably be several different architectures that a given application will run on.’ Beyond the goals of exascale lie a new set


of challenges and milestones that must be surmounted by future development. To lay the foundation for future innovation requires today’s computer scientists to think carefully about the legacy they leave for the next generation. Te industry needs real cooperation and teamwork to meet the requirements of exascale but also to lay the groundwork for future technologies that can successfully use the tools that are created today. l


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