Focus
The things to know about RISC-V By Mike Bartley, CEO, Alpinum Consulting
T
he semiconductor industry is constantly evolving, driven by innovation and technological
advancements. One particularly transformative development in recent years is RISC-V, an open-source Instruction Set Architecture (ISA) that has quickly emerged as a signifi cant alternative to established proprietary architectures like Arm and x86. RISC-V’s compelling benefi ts and customisation capabilities are now signifi cantly reshaping the semiconductor landscape. T e architecture was initially developed
at the University of California in 2010. As a fi ſt h-generation Reduced Instruction Set Computing (RISC) type, it off ers simplifi ed, modular instructions to streamline processor effi ciency; see Figure 1. By 2022, over 10 billion chips with RISC-V cores had already been shipped. Today, this architecture is managed by RISC-V International (RVI).
RISC-V vs Arm and x86 Arm performs well for mobile and embedded applications, yet licensing constraints limit its customisation. Intel’s legacy x86 architecture delivers high computational performance but off ers limited fl exibility due to its proprietary nature.
RISC-V is strategically positioned to
challenge the dominance of both architectures. It can easily dislodge Arm’s prevalence in the embedded and mobile spaces through its cost advantages and the open ecosystem it fosters, enabling quicker hardware design iterations and product innovation cycles. While RISC-V supports complete custom extensions due to its open nature, Arm requires licensing to integrate proprietary features, limiting design freedom for specialised applications. When evaluating performance across
major processor families, x86 has excellent computational throughput and strong graphics capabilities, although it is not very power effi cient. In comparison, Arm excels in energy-effi cient designs and does well in high-performance embedded applications, delivering impressive graphics and data handling. RISC-V also off ers commendable performance across computational, graphical and data-intensive tasks. And when customised appropriately, it holds signifi cant advantages in power effi ciency due to its open and adaptable design. Since 86 systems consume more power,
they require sophisticated cooling, which adds to the design and operational overheads. Arm processors, optimised for mobile and embedded devices, operate with lower thermal output and support a wide range of energy-
08 October 2025
www.electronicsworld.co.uk
saving states. RISC-V chips vary depending in implementation but can be confi gured for optimal power effi ciency. T is makes them highly competitive in power-sensitive environments such as wearables and IoT, where minimal heat generation and power draw are crucial. And, unlike these proprietary ISAs, RISC-V
eliminates costly licensing fees. T is fi nancial advantage signifi cantly lowers entry barriers, so smaller companies and startups can benefi t. T e lack of royalty fees reduces costs per chip, lowering supply chain costs.
The importance of RISC-V T e importance of RISC-V lies in its open source model, which promotes collaborative innovation and democratises processor design. T is accelerates product development and facilitates diverse, tailored solutions across many applications, ranging from embedded systems to high-performance computing. RISC-V allows engineers to select and
incorporate only the instruction set features that are necessary. T is modular approach optimises performance, power consumption and chip area specifi cally for targeted applications. T e modularity also allows for tailored security extensions to be added, providing even more robust protection against vulnerabilities. Being modular makes it scaleable, too, which is useful in various applications, from low-power IoT
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40 |
Page 41 |
Page 42 |
Page 43 |
Page 44
