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COMMENT


GENESIS project launched as Europe transitions to sustainable


T


his integrated, large-scale initiative aims to enable Europe’s chip industry to meet its sustainability goals, from materials  Coordinated by CEA-Leti, the three-year project brings together 58 partners spanning the entire European semiconductor value chain, from large enterprises and SMEs to research institutes, universities, and industry  solutions in emission control, eco-friendly materials such as alternatives to PFAS-based     challenges of building a truly sustainable semiconductor ecosystem,” says Laurent Pain, sustainable electronics program director  urgency and the opportunity of Europe’s green   


45 Sustainability innovations driven by four strategic pillars


Pain, manager of the project, noted that the  sustainability-driven innovations covering the semiconductor lifecycle, guided by four strategic pillars: • Pillar 1 – Monitoring & Sensing: Real-time


semiconductor manufacturing A pan-European consortium dedicated to developing sustainable processes and technologies for the semiconductor-manufacturing industry announced the launch of the GENESIS project in June.


emissions tracking, traceability, and process feedback systems


• Pillar 2  advanced semiconductor processes


• Pillar 3 in recycling (solvent, gas, slurries), reuse, and sustainable replacements


• Pillar 4 Strategies to reduce dependency on CRM and strengthen resource security Complimenting these pillars, the project’s  that includes deploying sensor-integrated  


a leader in green semiconductor innovation  


    commitments,” says Anton Chichkov, head of programs at Chips Joint Undertaking (Chips JU), a public-private partnership created to bolster Europe’s semiconductor industry   “As chips become the backbone of    challenge by pioneering sustainable   initiative, Europe is not only investing in cleaner technologies—it’s positioning itself as a global leader in green semiconductor 


  Chips Joint Undertaking by the European Commission, participating EU member states,  


The Five Critical Stages in Chip-Making Lifecycle Addressed by GENESIS JUNE 2025 | ELECTRONICS FOR ENGINEERS 23


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