high-performance computing ➤


Ridge to customise the Sierra and Summit system configurations for their specific needs.


Open Power Te first OpenPower Summit, held earlier this year in San Jose, California in tandem with Nvidia’s GPU Technology Conference (GTC) demonstrated the prototype of Firestone, IBM’s first OpenPower server oriented towards HPC. Te IBM Power8 server is due out later this year. It will be manufactured by Taiwan’s Wistron, sold by IBM, and combines the technologies of Nvidia and Mellanox. At the OpenPower event,


Sumit Gupta, general manager of accelerated computing at Nvidia, highlighted that this new system is the first in a new series of high- density GPU-accelerated servers for OpenPower high-performance computing and data analytics. Te introduction of NVLink


and Mellanox’ constant efforts to deliver more bandwidth means this architecture is already adapting to the new data-centric


WE INTEGRATE ALL OF THESE I/OS WITHIN ONE SINGLE CHIP


workloads that were cited by the DOE as defining a paradigm shiſt in computational workloads over the coming years. Tese first prototype boards


will be used by the DOE to support the development of the Coral machines as they represent the closest thing available to the Power9 processor that will be installed in the DOE’s Oak Ridge and Lawrence Livermore national laboratories. With the Pascal architecture not


even released yet, Volta is set to be the next generation accelerator architecture and will feature NVLink, so it is likely that the IBM system will be heavily invested in the performance of these GPUs. It may be that IBM is relying


on this, by planning a small, very energy-efficient processor that


essentially acts as a conduit for the accelerators to do the majority of the heavy liſting. However it is not just IBM


and the national laboratories that are developing processing technologies to cope with the demands of tomorrow’s data- centric applications. Several companies have used their own experience and IP to develop their own server on a chip (SOC) or even whole mainframe systems for the HPC industry.


ARM processors and SOCs Te investment from the US national labs is also a clear sign that energy efficiency as well as the ability to handle large amounts of data are primary concerns of the largest supercomputers. Tis need for energy efficiency and a drive towards data intensive compute operations has encouraged people to look even further outside the traditional HPC environment to find a solution to increasing power needs. Jeff Underhill, director server


programmes at ARM, cited ‘the need to process ever-increasing amounts of data and gain insight.’ Te need for new processor technologies was not confined to HPC, he continued: ‘Look at more traditional server environments and a lot of the focus on big data analytics today where people are looking at increasingly scaled out architectures.’ Darren Cepulis, data centre


evangelist at ARM, said: ‘For the larger supercomputer sites, there are major challenges around compute density and just how much compute one can fit within a power envelope. Early on, I think, that is what drove some of these investigations into leveraging ARM – the fact that we can operate an SOC purpose built for servers and for the HPC space.’


Applied Micro Applied Micro have developed SOCs based on ARM architecture infused with their own IP, which comes from the company’s traditions in the telecoms industry.


18 SCIENTIFIC COMPUTING WORLD


Here, Power7 systems receive a final check. The Power9 processor will be installed at Oak Ridge and Livermore


Tis has led them to build a system from the ground up that focuses on increasing I/O, as Applied Micro can integrate networking components directly onto the chip. Kumar Sankaran, senior


director of soſtware and platform engineering at Applied Micro, said: ‘Historically if you look at any server that was based on Intel, you would typically have a bunch of cores, of CPUs without any surrounding I/O. Or there would be very little I/O that is provided by the Xeon processor solutions in general.’ Sankaran continued: ‘So what


we mean by server-on-chip is that we integrate all of these I/Os within one single chip, so we integrate things like 10G Ethernet, PCIE gen 3 interfaces; we integrate SATA gen3 and we also integrate the whole memory


controller subsystem within one SOC.’ Sankaran explained that if


you were to build a design using the X-Gene family of products you would have a much simpler design, but also including the ARM cores and networking elements that differentiate them from some of the processing technologies already available. Mike Major, vice president


of marketing, said: ‘We looked at everything and made a very conscious decision around the ARM architecture. In fact, when we decided that there was a place for a 64-bit ARM architecture, we approached ARM and worked together with them to develop that in the first place.’ Major continued: ‘Tere is a


sense within the EU in general that there is probably little love


@scwmagazine l www.scientific-computing.com


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