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high-performance computing ➤ Getman said: ‘We consciously made a


switch over the last few years to expand our customer base by both continuing technology development for our traditional users as well as expand our tool flow to cater to soſtware coders.’ A key facet of this technology is that


Xilinx is letting programmers take the work they have done in C and port it over to OpenCL using the technology from HLS that is now integrated into its compilers. Varma said: ‘One thing that changes when you go from soſtware to hardware programming is that C programmers, OpenCL programmers, are used to dealing with a lot of libraries. Tey do not have to write matrix multiplications or filters or those kinds of things, because they are always available as library elements. Now hardware languages oſten have libraries, but they are very specific implementations that you cannot just change for your use.’ Varma concluded: ‘By writing in C, our


HLS technology can re-compile that very efficiently and immediately. Tis gives you a tremendous capability.’


Coprocessor or something bigger? FPGA manufacturers like Altera and Xilinx have been focusing their attention on using FPGAs in HPC as coprocessors or accelerators that would be used in much the same way as GPUs. Getman said: ‘Te biggest use model is


really processor plus FPGA. Te reason for that is there are still things that you want to run on a processor. You really want a processor to do what it is good at. Typically an FPGA will be used through something like a PCIE slot and it will be used as an acceleration engine for the things that are really difficult for the processor.’ Tis view was shared by Devadas Varma


who highlighted some of the functionality in an earlier release of OpenCL that increased the potential for CPU/GPU/ FPGA synergy. Varma said: ‘Te tool we have developed


supports OpenCL 1.2 and importantly it can co-exist with CPUs and GPUs. In fact in our upcoming release we will support partitioning workloads into GPUs, we already support this feature regarding CPUs. Tat is definitely where we are heading.’ However this was not a view shared by


Reuven Weintraub, at Gidel, who felt that to regard an FPGA simply as a coprocessor was to miss much of the point and many of the advantages that FPGAs could offer


30 SCIENTIFIC COMPUTING WORLD


SDAccel software flow diagram from Xilinx


to computing. Weintraub said: ‘For me a coprocessor is like the H87 was, you make certain lines of code in the processor and then you say “there’s a line of code for you” and it returns and this goes back and forth. Te big advantage of running with the FPGA is that the FPGA can have a lot of pipelining inside of it, solve a lot of things and have a lot of memory.’ He explained that an FPGA contains a


‘huge array of registers that are immediately available’ by taking advantage of the on- board memory and high-throughput that FPGAs can handle, meaning that ‘you do not necessarily have to use the cache because the data is being moved in and out in the correct order.’ Weintraub concluded: ‘Terefore it is


better to give a task to the FPGA rather than NOVO-G ACHIEVED


SPEEDS RIVALLING THE LARGEST CONVENTIONAL SUPERCOMPUTERS IN EXISTENCE


giving just a few up codes and the going back and forth. It is more task oriented. Computing is a balance between the processing, memory access, networking and storage, but everything has to be balanced. If you want to utilise a good FPGA then you need to give it a task that makes use of its internal memory so that it can move things from one job to another.’ Gidel has considerable experience in this field. Gidel provided the FPGAs for


the Novo-G supercomputer, housed at the University of Florida, the largest re- configurable supercomputer available for research. Te university is a lead partner in


the ‘Center for High-Performance Reconfigurable Computing’ (CHREC), a US national research centre funded by the National Science Foundation. In development at the UF site since 2009,


Novo-G features 192, 40nm FPGAs (Altera Stratix-IV E530) and 192, 65nm FPGAs (Stratix-III E260). Tese 384 FPGAs are housed in 96


quad-FPGA boards (Gidel ProcStar-IV and ProcStar-III) and supported by quad-core Nehalem Xeon processors, GTX-480 GPUs, 20Gb/s non-blocking InfiniBand, GigE, and approximately 3TB of total RAM, most of it directly attached to the FPGAs. An upgrade is underway to add 32 top-end, 28nm FPGAs (Stratix-V GSD8) to the system. According to the article ‘Novo-G: At


the Forefront of Scalable Reconfigurable Supercomputing’ written by Alan George, Herman Lam, and Greg Stitt, three researchers from the university, Novo-G achieved speeds rivalling the largest conventional supercomputers in existence – yet at a fraction of their size, energy, and cost. But although processing speed and


energy efficiency were important, they concluded that the principal impact of a reconfigurable supercomputer like Novo-G was the freedom that its innovative design can give to scientists to conduct more types of analysis, and examine larger datasets. Te potential is there.


@scwmagazine l www.scientific-computing.com


Xilinx


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