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high-performance computing

high-level language interfaces on the front end.’ Strickland continued: ‘In universities

now there is research into domain- specific languages, so people are trying to accomplish a certain class of algorithms may benefit from having a higher level interface than even C. Te idea behind exposing this intermediate compiler interface is you can now start working with the ecosystem to have front ends with higher-level interfaces.’ Over the past few years, there have been

Altera Cycone 3LS development board ➤

OpenCL. We had to pass 8,000 tests and that really strengthened the credibility of what we are doing with the FPGA.’ Strickland continued: ‘In the past, there

were a lot of FPGA compiler tools that took care of the logic but not the data management. Tey could take lines of C and automatically generate lines of RTL but they did not take care of how that data would come from the CPU, the optimisation of external memory bandwidth off the FPGA, and that is a large amount of the work.’ Traditionally optimising algorithms to

utilise fully the parallel architectures of FPGA technology involved significant experience using HDLs (hardware description languages) because they allowed programmers to write code that would address the FPGA at register-transfer level (RTL). RTL enables programmers to describe

the flow of data between hardware registers, and the logical operations performed on that data. Tis is typically what creates the difference in performance between more general processors and FPGAs, which can be optimised much more efficiently for a specific algorithm. Te difficulty is that that kind of coding

requires expertise and can be very time consuming. Hand-coded RTL may go through several iterations as programmers test the most efficient ways to parallelise the instruction set to take advantage of the programmable hardware on the FPGA. Strickland said: ‘With OpenCL or the

OpenCL compiler, you still write something 28 SCIENTIFIC COMPUTING WORLD

that is like C code that targets the FPGA. Te big difference I would say is the instruction set. Te big innovation has been the back end of our complier which can now take that C code and efficiently use the FPGA.’ Strickland noted that Altera’s compiler

‘does more than 200 optimisations when you write some C code. It is doing things like seeing the order in which you access memory so that it can group memory addresses together, improving the efficiency of that memory interface.’



Converting code from different languages

into an RTL description has been possible for some time, but these developments in OpenCL make it much easier for programmers without extensive knowledge of HDLs, such as VHDL and Verilog, to make use of FPGAs. However OpenCL is not the final piece

of the puzzle for FPGA programming. Strickland said: ‘Over time you may want to have other high-level interfaces. Tere is a standard called SPIR (Standard Portable Intermediate Representation). Te idea is that this allows you to kind of split up your compiler between the front end and the back end, enabling people to use different

two ideas behind the best way to program FPGAs: high-level synthesis (HLS) or OpenCL. As OpenCL has matured, Xilinx decided to adopt the standard but to keep the work it had done developing HLS technology and integrate that into the development environment conforming to the OpenCL standard. Getman said: ‘Te main problem is that

C is very much designed to go cycle to cycle, step by step. Unfortunately hardware doesn’t. Hardware has a lot of things running at the same time.’ Tis aspect was what made HLS attractive as a compiler that can take OpenCL, C or C++ and architecturally optimise it for the FPGA hardware. Xilinx acquired AutoESL and its HLS tool

AutoPilot in 2011 and began integrating it into its own development tools for FPGAs. Getman said: ‘Tat was really the big switching point. For many years, people had been promising really great results with HLS but in reality the results were a lot bigger and a lot slower than what could have been done by hand.’ Getman continued: ‘We have integrated

this technology into our tools and added a lot to it. Tis is really one of the big differentiators from our competition, even though we both have OpenCL support. Tis technology allows our users the opportunity to create their own libraries in real-time using C, C++ or OpenCL, rather than have to wait for the vendor to create specific libraries or specific algorithms for them. Varma said: ‘Te silver bullet in HLS is

the ability to take a sequential description that has been written in C and then find this parallelism, the concurrencies, without the user having to think. Tat was a necessary technology before we could do anything. It has been adopted by thousands of users already as a standalone technology, but what we do is embed that technology inside OpenCL compilers so that now it can be utilised in full soſtware mode and it is fully compatible with OpenCL.’

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