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R&D Award


Imec III-V FinFETs


In 2013 Imec, a nano-electronics research centre successfully demonstrated the first III-V compound semiconductor FinFET devices integrated epitaxially on 300mm silicon wafers, through a silicon fin replacement process.


The achievement illustrated progress toward 300mm and future 450mm high- volume wafer manufacturing of advanced heterogeneous CMOS devices, monolithically integrating high-density compound semiconductors on silicon. The breakthrough enables continual CMOS scaling down to 7nm and below, and also enables new heterogeneous system opportunities in hybrid CMOS-RF and CMOS-optoelectronics.


Imec believe this is the world’s first functioning CMOS compatible III-V FinFET device processed on 300mm wafers an accomplishment which demonstrates the technology as a viable next-generation alternative for the current state-of-the-art Si-based FinFET technology in high volume production.


The proliferation of smart mobile devices and the ever growing user expectations for bandwidth and connectivity will drive the continual need for software and hardware advancements that extend from networks to data servers and


mobile gadgets. At the core of the hardware will be new process technologies that allow for more power- efficient CMOS transistors and increased integration, enabling a higher level of functionality.


This prompts process technologies that enable heterogeneous devices spanning operating ranges for targeted circuits, maximizing the system performance. During the last decade, transistor scaling has been marked by leaps in process technologies to provide performance and power improvements.


The replacement of poly-silicon gate by high-k metal-gate in 45nm CMOS technology represented a major inflection in new material integration for the transistor.


The ability to combine scaled non-silicon and silicon devices might be the next dramatic transistor next step ending the all-silicon reign over digital CMOS. This work could represent an important enabling step.


At the finest grain, co-integration of high-density heterogeneous transistors has been challenged by the ability to combine disparate materials and structures while maintaining low enough complexity and defectivity.


Imec’s breakthrough process selectively replaces silicon fins with indium gallium arsenide (InGaAs) and indium phospide (InP), accommodating close to eight percent of atomic lattice mismatch. The technique is based on aspect-ratio trapping of crystal defects, trench structure, and epitaxial process innovations. The resulting III-V integrated on silicon FinFET device shows an excellent performance.


Imec’s research into next-generation FinFETs is performed as part of imec’s core CMOS program, in cooperation


74 www.compoundsemiconductor.net March 2014


with imec’s key partners including Intel, Samsung, TSMC, Globalfoundries, Micron, SK Hynix, Toshiba, Panasonic, Sony, Qualcomm, Altera, Fujitsu, nVidia, and Xilinx.


Soitec SA 4 Junction Cell


Soitec SA claims the industry’s first four- junction solar photovoltaic (PV) cell. The design comprises two dual-junction sub cells. The four-junction design uses two dual-junction sub cells grown on different III-V compound materials, which allows band-gap combinations to capture a broader range of the solar spectrum.


In developing the cell, Soitec used its proprietary semiconductor bonding and layer transfer technologies, which have been used in the semiconductor industry for decades.


The cell was developed in collaboration with Fraunhofer ISE and the Helmholtz Center for Materials and Energy (Berlin), which developed and deposited III-V epitaxial layers on new base materials as well as fabricating and characterizing the device. CEA-Leti (Grenoble, France) also participated in the project.


In 2013 Soitec surprised the industry (after three years of research) by entering a new record efficiency of 44.7 percent which was measured at a concentration of 297 suns. This indicates that 44.7 percent of the solar spectrum’s energy, from ultraviolet through to the infrared, is converted into electrical energy.


Last year, during a press briefing at Intersolar North America, Soitec announced its plans to produce a 50 percent efficient cell, pushing the NREL efficiency roadmap ahead by 5-10 years.


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