Technology Po w e r el e c t r o n i c s
IM
E
C
900
800
buffer thickness = 3.7 µm
700
600
buffer thickness = 2.7 µm
500
400
300
device breakdown voltage (V) 200
100
0
0 5 10 15 20 25
gate-drain distance (µm)
Fig. 3. (left) Breakdown voltage of lateral SiN/AlGaN/GaN/AlGaN double-heterostructure (DH) FETs deposited on silicon substrates
versus the gate-drain distance. For thick layers, a device breakdown of more than 800 V can be demonstrated for gate-drain
distances as low as 6 µm. Fig. 4. (right) IMEC’s SiN/AlGaN/GaN DHFET, deposited on silicon and mounted on a test board.
and a lower on-resistance. We can employ our Si
3
N
4
ising switching characteristics (reduced transient
deposition process in a controllable and repeatable times). Silicon devices are still plagued by Miller
way to regularly produce double-heterostructure capacitance – the parasitic capacitance between
FET epiwafers with in situ SiN passivation on 100 gate and drain – which leads to charging of the
and 150 mm silicon. gate and ultimately inefficient device switching.
Material produced by this approach has been pro- Our devices, on the other hand, have a much lower
cessed into FETs with breakdown voltages of up to Miller capacitance and its effect on the switching
800 V. These devices have the smallest gate-drain performance is negligible.
distances for a transistor with this breakdown volt- One of the drawbacks of these GaN HEMTs is that
age, despite the absence of field-plates that reduce they operate in depletion mode. Enhancement-mode
peak electric field strength. This result illustrates devices are preferred from a safety perspective in
the promise of III-nitride devices, which have the power-conversion applications because they are
potential to overturn silicon equivalents that cur- normally off. But we have produced some normally
rently dominate the power electronics industry. off HEMTs that have a positive threshold voltage of
0.3 V and a current density of more than 0.3 A/mm.
Lateral thinking The process used to make these devices included a
Our small gate-drain distance – it is only 5 µm in fluorine implantation below the gate. However, this
our transistors with a 600 V breakdown voltage and is not ideal because it causes local damage below
their 800 V equivalents with a 3.7 µm buffer thick- the gate of the channel, leading to large current dis-
ness – improves device performance. This is because persion and instability at high temperature.
the channel resistance restricts the performance of We are planning to improve the performance
these lateral devices, which feature source, gate of our enhancement-mode HEMTs by optimi zing
and drain contacts on the top surface. However, the the top layer stack. Other efforts over the next few
About the author
effect can be minimized by placing the source and years will include the development of transistors
Marianne Germain
drain contacts closer together. with breakdown voltages of 1000 V and a reli-
(Marianne.Germain@imec.be)
has a PhD in electrical
The on-resistance of our GaN-on-silicon ability study of our devices. We’ve also noticed
engineering from the
double-heterostructure FETs is more than one order that standalone GaN devices are being sampled to
Université de Liège, Belgium.
of magnitude smaller than silicon devices. The spe- the market and we believe that the integration of
She joined IMEC in 2001 and
cific on-resistance of our 600 V transistors is just Schottky AlGaN/GaN diodes and transistors on the
since 2007 has led the
4 mΩ cm
–2
, which is comparable to the best values same die, processed within the same flow, offer an NEXT/III-V group, focusing on
obtained by other GaN-on-silicon developers. How- extremely promising technology for making power-
III-nitrides. She thanks
ever, our transistor combines its low on- resistance converter modules. This type of technology could,
S Degroote, M Leys, K Cheng,
with increasingly small lateral device dimensions. for example, integrate solar-power inverters closer
J Derluyn, M Van Hove,
It is possible that more device improvements could to solar cells, thereby reducing the complexity and
D Visalli, J Das and
result from better designs and further reductions in size of solar systems. l
F Medjdoub for the
development of
contact resistance.
GaN-on-silicon epiwafers and
Silicon MOSFETs have been criticized for relat- Further reading
associated high power, and
ively high losses during switching. Fortunately, our K Cheng et al. 2008 Phys. Stat. Sol. 5 1600.
Prof. G Borghs for the
GaN transistors don’t seem to suffer from the same D Visalli et al. 2008 Ext. Abstr. IEEE Int. Conf. on
scientific leadership of the
fate and ongoing studies show that they have prom- Solid State Devices and Materials, Tsukuba 148. program.
Compound Semiconductor December 2008 compoundsemiconductor.net 25
CSDec08IMEC 23-25.indd 25 18/11/08 13:24:40
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