Title Dip solder paste—not just for PoP and array packages but leaded too!
Bob Willis
The following covers examples of good and defect coating processes and some of the problems
experienced in industry.
Dip solder paste—not just for
PoP and array packages but
leaded too!
Dipping solder paste was developed or and more recently introduced as an ideal Often engineers ask why the prod-
enhanced for package on package (PoP) rework product for plastic/ceramic ball uct can’t be used for many conventional
assembly to improve yields after the initial grid array and column grid array devices. surface mount components that can be
use of dip fluxing materials were unable These packages need solder paste to make demanding during rework. That was the
to overcome package warping during final effective and reliable joints during rework. case in these trials when Paul Cooper of
assembly or at the pre-stacking stage in Flux in many cases would not be suitable, Blundell asked the question at a recent
manufacture. The materials have been particularly with high temperature termina- SMART Group Conference. Large fine
used in the semiconductor industry for tions which do not go into a liquid state at pitch quad flat packs can be a challenge, as
packaging applications like ball attachment normal reflow temperatures. can large pin grid arrays and even plastic
leaded chip carriers using convection or IR
rework stations. These assembly processes
can be simplified with dip paste by the
elimination of mini stencils or manual
Basic DIP solder paste
specifications
Composition (%): Sn96.5Ag3.0Cu0.5
Melting point: 217˚C - 218
Alloy particle size : 20 µm
Metal loading: 80-85%
Flux type: 3 ROL0
Figures 1 & 2. Example of a QFP and PLCC after placement and removal from the dip paste surface on a dip
Flux content : 20.0% ± 1.0
plate used on rework stations. Tack time: 60-70 hours
Figure 2. Reflow soldering profile. Figure 3. Vapour phase soldering profile.
4 – Global SMT & Packaging – October 2009
www.globalsmt.net
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