Association newsTitle
but the actual temperature is higher,
there could be failed devices. Moreover,
most semiconductor parametric and Association news
functional characteristics are temperature
sensitive. Not knowing the actual junction
temperature during the final test process
can be costly either by yield reduction or by
reliability failures.
we experienced some expected issues.
There may be another use for this
During initial process development
technology in the realm of process
specific defects were seen in Japan. The
development for SMT assembly. Surface
industry benefited from this experience
mount process engineers are familiar with
but during product introduction in
the current slate of options and tools
Europe we also stumble with unforeseen
road to Zero Defects—
which is comprised of some tried and true
problems. Many but not all of these
screen printing
method; however the advent of lead-free
challenges have been overcome. The
With almost 60% of end of line defects
soldering has taken the industry to the
seminar is based on practical problems
associated during screen printing it’s es-
limits, and IC packages and PCBs are more
and in most cases solutions to effective
sential to understand the reason and pit-
vulnerable than at any time in the past
introduction of lead-free alloys, processes
falls that can occur during pre placements
due to the high temperatures required.
and the impact on product reliability.
and the solutions and practices available
Thus it appears that these versatile devices
This unique event will feature the most
to improve end of line yields. Many com-
should capable of serving as an alternative
common problems experienced with
panies believe rework is a way of life but it
to current temperature profiling tools,
components, printed boards, soldering
has a direct impact on production output,
providing more detailed information to the
alloys and process equipment along with
product costing and process efficiency.
user as to what is actually happening in the
different joint structures that result from
This workshop delivers the golden rules
package during reflow.
mixed alloy assembly. It will also update
to achieve zero defects—every engineer’s
In summary, given the significant
engineers with the ongoing challenges and
dream. Perhaps you already know the
challenges facing the electronics assembly
mitigation techniques for tin whiskers.
answers but just don’t put into practice
industry in this new lead-free world, it is
www.smartgroup.org
but for every engineer this workshop will
encouraging to know that that there are
deliver the facts to improve your process
tools being developed which might prove
yields.
useful in diagnosing the seemingly endless
The workshop starts at 10.00 am on 8
litany of problems we collectively face.
December at ITRI, Curo Park, Frogmore,
Being able to accurately measure and track
St. Albans, and will conclude at 4.00 pm.
temperature excursions inside the chip
package will likely prove a valuable tool
Who should attend?
in shedding light on the effects of high
If you are involved in SMT assembly as a
eipc Winter conference in
temperature soldering on both the IC
Line Manager, Process Engineer or QA
Toulouse, France
package and the IC itself giving us a before
then this workshop will add real benefit
The 2010 EIPC Winter Conference will
unseen picture of what is happening and
to your objectives to improve end of line
take place 28 & 29 January in Toulouse,
what we might expect.
defects levels. It will allow you to take the
France. Keynote speakers for this event
steps required to analyze your process and
1
will be Walt Custer, president of Custer
http://www.jedec.org/download/search/
procedures to improve line yield. www.
Consulting Group, who will present a
jesd51-4.pdf
smartgroup.org
business outlook on the global electronics
industry, and Hans Friedrichkeit, presi-
Verdant Electronics founder and president
lead-Free product Failures causes
dent of PCB Network, who will present
Joseph (Joe) Fjelstad has more than 35 years
and cures seminar
on new business opportunities for the
of international experience in electronic
Lead-Free has now become a mainstream
European PCB industry.
interconnection and packaging technology in
assembly process for many companies in
Day one of the conference program
a variety of capacities from chemist to process
Europe and overseas. However, there are
will include sessions on management,
engineer and from international consultant
many contract manufacturers undertaking
technical requirements for avionics,
to CEO. Mr. Fjelstad is also a well known
a combination of tin/lead and lead-free
aerospace and automotive PCBs, bonus
author writing on the subject of electronic
assembly with associated challenges. Com-
programmes, and factory tours. Day two
interconnection technologies. Prior to founding
panies that are exempt from legislation or
will cover advanced technical solutions
Verdant, Mr. Fjelstad co-founded SiliconPipe
concerned with the many issues of lead-
using PCB technologies, high reliability
a leader in the development of high speed
free are struggling, as predicated, from the
manufacturing of PCBs and ML, and
interconnection technologies. He was also
component industries total conversion to
adding value to PCB through advanced
formerly with Tessera Technologies, a global
lead-free only finishes. Some companies
thermal management, traceability and
leader in chip-scale packaging, where he was
within the high reliability market are
reliability.
www.eipc.org
appointed to the first corporate fellowship for his
having to convert to Pb free because the
innovations.
supply chain cannot support their assem-
blies and volumes rather than because of
legislation drivers.
During initial worldwide research
www.globalsmt.net Global SMT & Packaging – October 2009 – 51
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