Cost reduction of wafer level packaging by using established materials from non-electronics industries
Cost reduction of wafer
level packaging by using
established materials from
non-electronics industries
by Giles Humpston, Tessera, Aylesbury, Buckinghamshire, United Kingdom
introduction
turret, forms an enclosure for the die. This
Solid state imagers are
Each year more than one billion image
is illustrated in Figure 1.
being incorporated in an
sensors are produced, which primarily find
This structure has two principal draw-
ever-expanding diversity of
application in portable electronics products
backs. The first is that the cost of assembly
products. Consumer demand
such as camera phones, digital still cameras
is incremental for each die packaged. A
for vast quantities of camera
and, increasingly, laptop computers. Predic-
second limitation is that the imager die is
tions are that this market will continue
modules at a very low price
totally unprotected until the final assembly
growing for some years as cell phones with
is forcing a search for new
operation, when the lens turret is attached.
multiple cameras become the norm and
Image sensors are complex yet delicate elec-
packaging technologies
automotive driver aids enter the video age,
tro-optical devices fabricated in semicon-
utilizing radically different
which could entail 10 or more cameras be-
ductor plants of the highest standards. As
materials. ing installed on each vehicle.
such, any further processes, even something
This paper presents a new
In common with most other semicon-
as simple as a wash with de-ionised water,
wafer-level chip-size package
ductor devices, solid state image sensors
will cause catastrophic damage. Similarly, if
that comfortably exceeds
require some form of enclosure in order
a particle of dirt as small as 1 µm diameter,
mobile phone and automotive
to ensure longevity. Traditionally this
which is 100 times less then the width of
reliability standards. A key
was achieved using chip-on-board (COB)
a human hair, lands on the sensor, it will
element of the package is
assembly processes. In this scheme the
cause a highly visible black spot in the im-
imager is attached to a substrate, and wire
that it is fabricated using
age. It is therefore not surprising that more
bonds form interconnections between
a material produced in
than 90% of defects in camera modules are
bond pads on the die and lands on the
related to contamination by particles
1
. The
extremely high tonnage for
substrate. The substrate forms the base of
short-term solution is to invest in clean
an entirely different industry
the enclosure. Over the die is then placed
rooms and operator training. However,
and purpose, and therefore a lens turret, which houses the optical train
many solid state camera module manu-
is significantly cheaper than
of the camera. The lens turret is sealed to
facturers are already operating Class 10
anything comparable made
the substrate, so the lower optical surface,
environments, or better, so there is not a
specifically for semiconductor
in combination with the sidewalls of the
great deal of scope for further improvement
applications.
at affordable cost.

Wafer level packaging
Wafer-level packaging (WLP) is an alterna-
Keywords: Wafer-Level Chip Size
tive approach where the die are packaged
Package (WLCSP), Image Sensor,
while still in wafer form and the wafer is
Electrophoretic Material
then singulated to free individually pack-
aged die. WLP has the advantage that the
costs of packaging are shared among the
good die on the wafer, greatly reducing
packaging costs per die. With typically
between 750 and 1,250 die on a 200 mm
This article was presented as a paper at
Figure 1. Camera module assembled using chip-on- !
diameter image sensor wafer, this results
the International Wafer-Level Packaging
board processes. The lens turret housing forms a seal
in an order of magnitude decrease in the
Conference, held in San Jose, California,
over the exposed die. Drawing not to scale. Source:
Tessera.
packaging time and cost per die, compared
October 13-16, 2008.
18 – Global SMT & Packaging – June 2009 www.globalsmt.net
Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44  |  Page 45  |  Page 46  |  Page 47  |  Page 48  |  Page 49  |  Page 50  |  Page 51  |  Page 52