technology viewpoint
Many flavours on the menu for 22nm and beyond
IC manufacturing has always had to look forward a number of nodes ahead to have any chance of instigating change in line with Moore’s Law expectations. Beyond 22nm is where the industry currently sees challenges and
Dr.An Steegen, Senior Vice President of process technology development at global research centre imec provides some insight into the manufacturing possibilities for these challenges.
I
n the majority of today’s consumer electronics and handheld devices 65nm and 40nm technology is used while 28nm is being qualified for leading-edge products. To be able to provide consumers and businesses with ever faster computing, lower power consuming devices with smaller form factors, the technology development continues to follow Moore’s law. To enable smaller dimensions, new device architectures, materials and litho techniques are needed.
To improve performance at lower operating voltage, fully-depleted device architectures are being introduced as early as the 22nm technology node and will likely be fully adopted by foundry for the 14nm technology node. Imec has a long history developing FinFET devices, but also ultra-thin SOI and implant-free quantum well devices are being benchmarked. By screening different technology options, imec helps its partners to make educated
choices depending on their specific applications, the technology readiness, cost etc
To improve the transistor performance further, high- mobility channels for NMOS and PMOS will be co- integrated on a Si-substrate. Imec is accelerating the co-integration of germanium for pFETs (14nm) and III-V materials such as InGaAs for nFETs (11nm). Different integration routes are being investigated while the performance of these devices is being checked at 11nm dimensions.
Thanks to our partnership with ASML, we have access to the most advanced litho tools. We study immersion and EUV lithography in combination with advanced patterning solutions. High on our agenda is an intense exercise comparing EUV and immersion lithography for the 14nm node. This study will be help our partners to make choices on the introduction of EUV for 14nm or beyond.
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www.siliconsemiconductor.net Issue III 2012
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